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公开(公告)号:EP0241226A3
公开(公告)日:1988-09-07
申请号:EP87302889
申请日:1987-04-02
发明人: Yamagishi, Hideo , Yamaguchi, Minori , Asaoka, Keizo , Hiroe, Akihiko , Kondo, Masataka , Tsuge, Kazunori , Tawada, Yoshihisa
CPC分类号: H01L31/076 , H01L31/03762 , Y02E10/548
摘要: A semiconductor device of amorphous or microcrystalline semiconductor for use as a photovoltaic cell has a multijunction (1) wherein one or more layers (4, 5) including a high concentration of impurities is interposed between a p-type conductive layer (2) and an n-type conductive layer (3). A tunnel junction is formed by the interposed layer (4, 5) to elevate photo-electric conversion rate.
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公开(公告)号:EP0494088B1
公开(公告)日:1999-02-24
申请号:EP92104628.0
申请日:1986-11-01
发明人: Yamagishi, Hideo , Kondo, Masataka , Nishimura, Kunio , Hiroe, Akihiko , Asaoka, Keizou , Tsuge, Kazunori , Tawada, Yoshihisa , Yamaguchi, Minori
IPC分类号: H01L31/075 , H01L31/20
CPC分类号: H01L31/075 , H01L31/202 , H01L31/204 , Y02E10/548 , Y02P70/521
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公开(公告)号:EP0494088A1
公开(公告)日:1992-07-08
申请号:EP92104628.0
申请日:1986-11-01
发明人: Yamagishi, Hideo , Kondo, Masataka , Nishimura, Kunio , Hiroe, Akihiko , Asaoka, Keizou , Tsuge, Kazunori , Tawada, Yoshihisa , Yamaguchi, Minori
IPC分类号: H01L31/075 , H01L31/20
CPC分类号: H01L31/075 , H01L31/202 , H01L31/204 , Y02E10/548 , Y02P70/521
摘要: A semiconductor device comprising a pin-type or nip-type amorphous-containing semiconductor layer and at least two electrodes, characterized in that an amount of dopant in a p-type or n-type layer is minimized at a junction interface of p/i or n/i and increases gradually toward an interface of p/electrode or n/electrode.
摘要翻译: 一种半导体器件,包括pin型或nip型含非晶半导体层和至少两个电极,其特征在于,在p / i的结界面处,p型或n型层中的掺杂剂的量被最小化 或n / i,并逐渐向p /电极或n /电极的界面逐渐增加。
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公开(公告)号:EP0193820A3
公开(公告)日:1988-01-07
申请号:EP86102335
申请日:1986-02-22
CPC分类号: H01L31/022425 , H01L21/0272 , H01L31/0224 , H01L31/046 , Y02E10/50
摘要: A method for forming a thin film pattern comprising the steps in sequence of forming a lift-off layer directly on a substrate wherein a pattern of the lift-off layer is reverse to a desired thin film pattern, forming a thin film on the substrate, removing an undesirable portion of the thin film together with the lift-off layer; and a method for producing a semiconductor device comprising the steps in sequence of forming a first electrode on an insulated substrate, removing a part of the first electrode, forming a semiconductor including amorphous material on the first electrode, forming a lift-off layer on the semiconductor including amorphous material at such a place whereon a second electrode is not desired to be formed, and forming a second electrode on the semiconductor. According to the present invention, a thin film pattern can be formed at low production cost, with high productivity and accuracy, and with less danger during the process.
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公开(公告)号:EP0193820A2
公开(公告)日:1986-09-10
申请号:EP86102335.6
申请日:1986-02-22
CPC分类号: H01L31/022425 , H01L21/0272 , H01L31/0224 , H01L31/046 , Y02E10/50
摘要: A method for forming a thin film pattern comprising the steps in sequence of forming a lift-off layer directly on a substrate wherein a pattern of the lift-off layer is reverse to a desired thin film pattern, forming a thin film on the substrate, removing an undesirable portion of the thin film together with the lift-off layer; and a method for producing a semiconductor device comprising the steps in sequence of forming a first electrode on an insulated substrate, removing a part of the first electrode, forming a semiconductor including amorphous material on the first electrode, forming a lift-off layer on the semiconductor including amorphous material at such a place whereon a second electrode is not desired to be formed, and forming a second electrode on the semiconductor.
According to the present invention, a thin film pattern can be formed at low production cost, with high productivity and accuracy, and with less danger during the process.摘要翻译: 一种用于形成薄膜图案的方法,包括以下步骤:直接在基板(1)上形成剥离层(2),其中剥离层的图案与期望的薄膜图案相反,形成 薄膜(3),与剥离层(2)一起去除薄膜(3)的不希望的部分; 以及一种半导体器件(8)的制造方法,包括以下步骤:在绝缘基板(4)上形成第一电极(5),去除第一电极(5)的一部分,形成包含非晶材料的半导体 6)在第一电极(5)上,在半导体上形成第二电极(7)的半导体的半导体层上形成剥离层,所述半导体包括无定形材料,其中不希望形成第二电极。 根据本发明,可以以低生产成本,高生产率和精确度地形成薄膜图案,并且在该过程中具有较小的危险。
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公开(公告)号:EP0221523B1
公开(公告)日:1994-08-03
申请号:EP86115170.2
申请日:1986-11-01
发明人: Yamagishi, Hideo , Kondo, Masataka , Nishimura, Kunio , Hiroe, Akihiko , Asaoka, Keizou , Tsuge, Kazunori , Tawada, Yoshihisa , Yamaguchi, Minori
CPC分类号: H01L31/075 , H01L31/202 , H01L31/204 , Y02E10/548 , Y02P70/521
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公开(公告)号:EP0494090A3
公开(公告)日:1992-08-05
申请号:EP92104633.0
申请日:1986-11-01
发明人: Yamagishi, Hideo , Kondo, Masataka , Nishimura, Kunio , Hiroe, Akihiko , Asaoka, Keizou , Tsuge, Kazunori , Tawada, Yoshihisa , Yamaguchi, Minori
IPC分类号: H01L31/075 , H01L31/20
CPC分类号: H01L31/075 , H01L31/202 , H01L31/204 , Y02E10/548 , Y02P70/521
摘要: A semiconductor device comprising a nip-type or pin-type amorphous-containing semiconductor layer and at least two electrodes; characterized in that at least one semiconductor layer (I) being the same conductivity type as the adjacent semiconductor (II) and having higher impurity density is/are interposed between the semiconductor layer (II) and an electrode.
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公开(公告)号:EP0221523A2
公开(公告)日:1987-05-13
申请号:EP86115170.2
申请日:1986-11-01
发明人: Yamagishi, Hideo , Kondo, Masataka , Nishimura, Kunio , Hiroe, Akihiko , Asaoka, Keizou , Tsuge, Kazunori , Tawada, Yoshihisa , Yamaguchi, Minori
CPC分类号: H01L31/075 , H01L31/202 , H01L31/204 , Y02E10/548 , Y02P70/521
摘要: A semiconductor device comprising a pin-type or nip-type amorphous-containing semiconductor layers; characterized in that (1) at least one interlayer made of semiconductor or insulator having higher electrical resistivity than a semiconductor which adjoins the interlayer is/are interposed between semiconductor layers or between a semiconductor and an electrode, (2) an amount of dopant in a p-type or n-type layer is least at a junction interface of p/i or n/i and increases gradually toward a junction interface of p/electrode or n/electrode, or (3) a p-type semiconductor layer being the same conductive type as the p-type semiconductor and having higher impurity density and/or an n-type semiconductor layer being the same conductive type as the n-type semiconductor layer and having higher impurity density is/are interposed between the p-type semiconductor layer and the electrode at the side of the p-type semiconductor layer and/or between the n-type semiconductor layer and the electrode at the side of the n-type semiconductor layer.
According to the semiconductor device of the present invention (in the case of (1) or (2)), large Voc and electric current at a specific voltage can be obtained, further in the case of (3), photoelectric convertion effeciency can be improved.-
公开(公告)号:EP0494090A2
公开(公告)日:1992-07-08
申请号:EP92104633.0
申请日:1986-11-01
发明人: Yamagishi, Hideo , Kondo, Masataka , Nishimura, Kunio , Hiroe, Akihiko , Asaoka, Keizou , Tsuge, Kazunori , Tawada, Yoshihisa , Yamaguchi, Minori
IPC分类号: H01L31/075 , H01L31/20
CPC分类号: H01L31/075 , H01L31/202 , H01L31/204 , Y02E10/548 , Y02P70/521
摘要: A semiconductor device comprising a nip-type or pin-type amorphous-containing semiconductor layer and at least two electrodes; characterized in that at least one semiconductor layer (I) being the same conductivity type as the adjacent semiconductor (II) and having higher impurity density is/are interposed between the semiconductor layer (II) and an electrode.
摘要翻译: 一种半导体器件,包括夹持型或pin型非晶体半导体层和至少两个电极; 其特征在于,在所述半导体层(II)和电极之间插入至少一个与相邻半导体(II)相同的导电类型并且具有较高杂质密度的半导体层(I)。
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公开(公告)号:EP0221523A3
公开(公告)日:1989-07-26
申请号:EP86115170.2
申请日:1986-11-01
发明人: Yamagishi, Hideo , Kondo, Masataka , Nishimura, Kunio , Hiroe, Akihiko , Asaoka, Keizou , Tsuge, Kazunori , Tawada, Yoshihisa , Yamaguchi, Minori
CPC分类号: H01L31/075 , H01L31/202 , H01L31/204 , Y02E10/548 , Y02P70/521
摘要: A semiconductor device comprising a pin-type or nip-type amorphous-containing semiconductor layers; characterized in that (1) at least one interlayer made of semiconductor or insulator having higher electrical resistivity than a semiconductor which adjoins the interlayer is/are interposed between semiconductor layers or between a semiconductor and an electrode, (2) an amount of dopant in a p-type or n-type layer is least at a junction interface of p/i or n/i and increases gradually toward a junction interface of p/electrode or n/electrode, or (3) a p-type semiconductor layer being the same conductive type as the p-type semiconductor and having higher impurity density and/or an n-type semiconductor layer being the same conductive type as the n-type semiconductor layer and having higher impurity density is/are interposed between the p-type semiconductor layer and the electrode at the side of the p-type semiconductor layer and/or between the n-type semiconductor layer and the electrode at the side of the n-type semiconductor layer. According to the semiconductor device of the present invention (in the case of (1) or (2)), large Voc and electric current at a specific voltage can be obtained, further in the case of (3), photoelectric convertion effeciency can be improved.
摘要翻译: 一种半导体器件,包括pin型或nip型含非晶半导体层; 其特征在于,(1)在半导体层之间或在半导体与电极之间插入至少一个由半导体或绝缘体构成的中间层,该中间层具有比与中间层相邻的半导体更高的电阻率,(2) p型或n型层在p / i或n / i的结界面处最小并且朝向p /电极或n /电极的结界面逐渐增加,或(3)p型或n型层为p型 与p型半导体具有相同的导电类型并具有较高的杂质密度和/或与n型半导体层具有相同导电类型并且具有较高杂质密度的n型半导体层插入在p型半导体 层和位于p型半导体层侧的电极和/或在n型半导体层和n侧半导体层侧的电极之间。 根据本发明的半导体器件(在(1)或(2)的情况下),可以获得特定电压下的大Voc和电流,而且在(3)的情况下,光电转换效率可以是 改进。
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