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15 条记录 (耗时 0.008 秒)

    Circuit and method of compensating for membrane stress in a sensor
    1.
    发明公开
    Circuit and method of compensating for membrane stress in a sensor 失效
    电路和方法，用于补偿膜中的传感器机械张力

    公开(公告)号：EP0833137A2

    公开(公告)日：1998-04-01

    申请号：EP97116849.7

    申请日：1997-09-29

    申请人： MOTOROLA, INC.

    发明人： Baskett, Ira E. ,  McNeil, Andrew C.

    IPC分类号： G01L1/22

    CPC分类号： G01L1/2275 ,  G01L9/0055 ,  G01L9/06

    摘要： A circuit and method for correcting a sense signal of a sensor (100) where the sense signal is reduced by a negative nonlinear error component introduced by membrane stress in a sensor structure (101). A first transducer (103) is disposed at a location (203) having substantial bending stress to produce a sense signal having a linear component and the nonlinear error component. A second transducer (102) is disposed at a location (202) with substantially zero bending stress to produce a sense signal having the nonlinear error component but a substantially zero linear component. The sense signal from the second transducer (102) is added to the sense signal from the first transducer (103) to correct the nonlinear error for producing a linear output sense signal (V OUT ) of the sensor (100) which is representative of the physical condition.

    Sensor, bias circuit and method for shunting current therein
    2.
    发明公开
    Sensor, bias circuit and method for shunting current therein 失效
    传感器偏置电路和方法在其中使用的电流分流

    公开(公告)号：EP0845665A3

    公开(公告)日：1999-04-14

    申请号：EP97119627.4

    申请日：1997-11-10

    申请人： MOTOROLA, INC.

    发明人： Baskett, Ira E.

    IPC分类号： G01L9/06

    CPC分类号： G01L9/0042 ,  G01L9/06

    摘要： A method and a structure for terminating or endpointing an electrochemical etch that allows integration of a sensor circuit (16 1 ) with a diaphragm (14 1 ). The addition of a sensor diode (41 1 ) and a bias diode (51 1 ) block current from the sensor circuit (16 1 ) from interfering with the reverse bias current in a diaphragm diode (15 1 ). The reverse bias current in the diaphragm diode (15 1 ) is used to determine when to terminate the etch that controls the thickness of diaphragm (14 1 ). The diaphragm (14 1 ) is a portion of a semiconductor material that remains after an electrochemical etch.

    Gate having reduced miller capacitance
    3.
    发明公开
    Gate having reduced miller capacitance 失效
    Torner einer reduziertenMillerkapazität。

    公开(公告)号：EP0147635A2

    公开(公告)日：1985-07-10

    申请号：EP84114210.2

    申请日：1984-11-24

    申请人： MOTOROLA, INC.

    发明人： Baskett, Ira E. ,  Petty, Cleon

    IPC分类号： H03K19/013 ,  H03K19/082

    CPC分类号： H03K19/0826 ,  H03K19/0136

    摘要： A three state gate having an output capable of assuming an active high, an active low, or a high impedance state is disclosed that has circuitry for removing the inherent Miller capacitive charge from an output transistor during the high impedance state. A phase-splitter means is responsive to an input signal and an output enable signal and drives a push-pull output means. The circuitry for removing the capacitive charge maintains a node in said phase-splitting portion at substantially the same voltage whether the tri-state gate is providing a high impedance output or an active low output so that transitions between said impedance output and said active low output can occur at a faster rate.

    摘要翻译： 公开了具有能够呈现有效高电平，有效低电平或高阻抗状态的输出的三态门，其具有用于在高阻抗状态期间从输出晶体管去除固有的米勒电容性电荷的电路。 输出装置包括用于向输出端提供电流的上部晶体管和用于从输出端吸收电流的下部晶体管。 耦合到输出装置的分相器装置确定上和下晶体管的导电性。 相位分离器装置响应于输入信号和输出使能信号。 第一晶体管具有耦合到上输出晶体管的基极的集电极。 第二晶体管具有耦合到下输出晶体管的基极的集电极，以及耦合到第一晶体管的发射极的基极。 第三晶体管具有耦合到第一晶体管的基极的集电极。 第四晶体管具有耦合到第三晶体管的发射极和输出使能端的发射极。 第五晶体管具有耦合到第四晶体管的集电极的基极，耦合到分相器晶体管的基极的集电极和耦合到下部输出晶体管的基极的发射极。

    Sensor, bias circuit and method for shunting current therein
    5.
    发明公开
    Sensor, bias circuit and method for shunting current therein 失效
    传感器，Vorspannungsschaltung und Verfahren zum darin verwendete Stromnebenschluss

    公开(公告)号：EP0845665A2

    公开(公告)日：1998-06-03

    申请号：EP97119627.4

    申请日：1997-11-10

    申请人： MOTOROLA, INC.

    发明人： Baskett, Ira E.

    IPC分类号： G01L9/06

    CPC分类号： G01L9/0042 ,  G01L9/06

    摘要： A method and a structure for terminating or endpointing an electrochemical etch that allows integration of a sensor circuit (16 1 ) with a diaphragm (14 1 ). The addition of a sensor diode (41 1 ) and a bias diode (51 1 ) block current from the sensor circuit (16 1 ) from interfering with the reverse bias current in a diaphragm diode (15 1 ). The reverse bias current in the diaphragm diode (15 1 ) is used to determine when to terminate the etch that controls the thickness of diaphragm (14 1 ). The diaphragm (14 1 ) is a portion of a semiconductor material that remains after an electrochemical etch.

    摘要翻译： 一种用于终止或终止电化学蚀刻的方法和结构，其允许传感器电路（161）与隔膜（141）的集成。 传感器二极管（411）和偏置二极管（511）的添加阻挡来自传感器电路（161）的电流，从而妨碍隔膜二极管（151）中的反向偏置电流。 隔膜二极管（151）中的反向偏置电流用于确定何时终止控制隔膜（141）的厚度的蚀刻。 隔膜（141）是在电化学蚀刻之后保留的半导体材料的一部分。

    Method of forming a piezoresistive pressure sensor and a piezoresistive pressure sensor
    6.
    发明公开
    Method of forming a piezoresistive pressure sensor and a piezoresistive pressure sensor 失效
    一种制备一个压阻式压力传感器，以及一个压阻式压力传感器的过程

    公开(公告)号：EP0729019A3

    公开(公告)日：1996-12-11

    申请号：EP96102659.8

    申请日：1996-02-22

    申请人： MOTOROLA, INC.

    发明人： Meyer, Brian D. ,  Baskett, Ira E.

    IPC分类号： G01L9/06

    CPC分类号： G01L9/0054 ,  Y10T29/49101 ,  Y10T29/49103

    摘要： A piezoresistive pressure sensor (30) has four resistive diffused regions (32) coupled into a bridge configuration (33) with four junctions (36). Each of the diffused regions has a first end connected to one of the four junctions and a second end connected to a different one of the four junctions. There are four contact diffusion terminals (34) disposed in contact with the bridge configuration, and each of the diffusion terminals is disposed at one of the four junctions such that the diffused regions are electrically connected essentially only by the contact diffusion terminals. Thus, no tap is required to electrically connect the contact diffusion terminals to the resistive diffused regions of the bridge, which results in increased sensor sensitivity.

    Method for protecting the periphery of a semiconductor wafer during an etching step
    7.
    发明公开
    Method for protecting the periphery of a semiconductor wafer during an etching step 失效
    Verfahren zum Schutz der Peripherie eines HalbleiterwaferswährendeinesÄtzvorgangs。

    公开(公告)号：EP0601298A1

    公开(公告)日：1994-06-15

    申请号：EP93115975.0

    申请日：1993-10-04

    申请人： MOTOROLA, INC.

    发明人： Pennell, Ronald C. ,  Baskett, Ira E. ,  Ford, Lynn William

    IPC分类号： H01L21/306 ,  G01L9/00

    CPC分类号： G01L9/0042 ,  H01L21/30608

    摘要： A method of etching a semiconductor wafer (20) includes providing a wafer (20) having a portion thereof to be etched. A highly doped region is formed in the periphery (24) of the wafer (20) which is subsequently etched. The highly doped region of the wafer (20) is substantially etch resistant to an etchant relative to the portion of the wafer (20) being etched.

    摘要翻译： 蚀刻半导体晶片（20）的方法包括提供具有待蚀刻部分的晶片（20）。 在晶片（20）的周边（24）中形成高度掺杂的区域，随后被蚀刻。 相对于被蚀刻的晶片（20）的部分，晶片（20）的高掺杂区域对蚀刻剂基本上是耐蚀刻的。

    Circuit and method of compensating for membrane stress in a sensor
    8.
    发明公开
    Circuit and method of compensating for membrane stress in a sensor 失效
    电路和方法，用于补偿膜中的传感器机械张力

    公开(公告)号：EP0833137A3

    公开(公告)日：1999-05-19

    申请号：EP97116849.7

    申请日：1997-09-29

    申请人： MOTOROLA, INC.

    发明人： Baskett, Ira E. ,  McNeil, Andrew C.

    IPC分类号： G01L1/22

    CPC分类号： G01L1/2275 ,  G01L9/0055 ,  G01L9/06

    摘要： A circuit and method for correcting a sense signal of a sensor (100) where the sense signal is reduced by a negative nonlinear error component introduced by membrane stress in a sensor structure (101). A first transducer (103) is disposed at a location (203) having substantial bending stress to produce a sense signal having a linear component and the nonlinear error component. A second transducer (102) is disposed at a location (202) with substantially zero bending stress to produce a sense signal having the nonlinear error component but a substantially zero linear component. The sense signal from the second transducer (102) is added to the sense signal from the first transducer (103) to correct the nonlinear error for producing a linear output sense signal (V OUT ) of the sensor (100) which is representative of the physical condition.

    摘要翻译： 的电路和方法，用于校正在感测信号是由膜应力在传感器结构（101）中引入负的非线性误差成分降低一个传感器（100）的感测信号。 第一换能器（103）在具有相当大的弯曲应力，以产生具有线性成分和非线性误差成分的检测信号的位置（203）被布置。 第二换能器（102）的位置处（202）具有基本零弯曲应力被配置为产生具有非线性误差成分而基本上为零的线性成分的感测信号。 从第二换能器（102）的感测信号被添加到从所述第一换能器（103）感测信号，以校正所述非线性误差用于制造传感器的线性输出感测信号（VOUT）（100），所有这些是代表物理的 条件。

    Optically programmed logic
    10.
    发明公开
    Optically programmed logic 失效
    Optisch programmierte Logik。

    公开(公告)号：EP0273306A2

    公开(公告)日：1988-07-06

    申请号：EP87118711.8

    申请日：1987-12-17

    申请人： MOTOROLA, INC.

    发明人： Baskett, Ira E.

    IPC分类号： H03K19/14 ,  H03K19/173 ,  G11C7/00

    CPC分类号： H03K19/1736 ,  H03K19/14

    摘要： A monolithically integrated logic circuit is provided that is programmed by an optical input. A plurality of input/output pads 22 are provided on a semiconductor substrate 21 having a planar surface. A plurality of semiconductor devices 29 and a plurality of light sensitive devices 25, 31 are formed with selected patterns in the surface. At least one metallic layer is formed on the substrate for coupling selected ones of the semiconductor devices, light sensitive devices, and input/output pads for forming a logic circuit, wherein an output of the logic circuit is determined by programming selected ones of the plurality of light sensitive devices by applying light thereto.

    摘要翻译： 提供了由光输入编程的单片集成逻辑电路。 多个输入/输出焊盘22设置在具有平坦表面的半导体衬底21上。 多个半导体器件29和多个光敏器件25,31在表面上形成有选定的图案。 在基板上形成至少一个金属层，用于耦合选定的半导体器件，光敏器件和用于形成逻辑电路的输入/输出焊盘，其中逻辑电路的输出通过编程多个 的光敏装置。