摘要:
Apparatus and method are disclosed for successive approximation analog-to-digital conversion of a variable analog input voltage to digital form by periodic sampling thereof, using a comparator to compare the relative values of the analog input voltage amplitude in a predetermined time interval and the upper limit of a reference voltage range which is successively adjusted until it closely approximates the digital value of the sampled analog input voltage in that time interval. The successive adjustment is performed by a successive approximation register which has an odd number of multiple stages, at least three, for each digital significant bit representing the upper limit of the reference voltage range to be used in the comparison. The accuracy and reliability of this upper limit is refined by using as the value of each significant bit the majority of its value in the multiple stages. After a number of comparisons that fixes the majority value of each significant bit, the resulting succession of the significant bits becomes the digital conversion of the analog input voltage in the respective time interval.
摘要:
A five volt tolerant integrated circuit signal pad having an initial fast pull-up to three volts and then operating as an open drain output with an external resistor for pulling up the output from about three volts to about five volts. The initial fast (active) pull-up is accomplished with active devices that reduces the overall pull-up time of a newer technology (lower operating voltage) integrated circuit output when transitioning from a logic 0 to a logic 1. Circuits of the integrated circuit output driver protect the internal operating circuit nodes from excessive voltage and leakage currents that would otherwise result from a voltage on the signal pad that is more positive than the operating voltage of the integrated circuit.
摘要:
An accurate RC oscillator circuit (10) for generating a signal of a predetermined frequency that accurately oscillates between two precise voltage levels, i.e., a low threshold voltage (VL) and a high threshold voltage (VH) is disclosed. The oscillator circuit uses first and second comparators (16, 18) having their outputs respectively coupled to set and reset inputs of a flip flop (20). The output of the flip flop is coupled to a series RC network for controlling the charging and discharging of the voltage across a capacitor (14) of the RC network. The interconnection (12) of the series RC network is coupled to an input of both the first and second comparators. The other input of the first comparator is coupled to a circuit (24) for applying a modified version (V'H) of the high threshold voltage such that the signal generated by the oscillator circuit does not exceed the precise high threshold voltage (VH). Likewise, the other input of the second comparator is coupled to a circuit (25) for applying a modified version (V'L) of the low threshold voltage such that the signal generated by the oscillator circuit does not fall below the precise low threshold voltage (VL).