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    LOW DISTORTION AMPLIFIER AND DOHERTY AMPLIFIER USING LOW DISTORTION AMPLIFIER
    3.
    发明公开
    LOW DISTORTION AMPLIFIER AND DOHERTY AMPLIFIER USING LOW DISTORTION AMPLIFIER 审中-公开
    VERZERRUNGSARMERVERSTÄRKERUND DOHERTY-VERSTÄRKERMIT VERZERRUNGSARMEMVERSTÄRKER

    公开(公告)号：EP2273672A1

    公开(公告)日：2011-01-12

    申请号：EP08738821.1

    申请日：2008-03-25

    申请人： Mitsubishi Electric Corporation

    发明人： YAMAUCHI, Kazuhisa ,  NOTO, Hifumi ,  INOUE, Akira ,  HAMADA, Tomokazu ,  NAKAYAMA, Masatoshi ,  HORIGUCHI, Kenichi

    IPC分类号： H03F1/32 ,  H03F1/07 ,  H03F3/21 ,  H03F3/60

    CPC分类号： H03F3/195 ,  H03F1/0288 ,  H03F1/3205 ,  H03F1/565 ,  H03F3/601 ,  H03F2200/387 ,  H03F2200/451

    摘要： Provided is a low distortion amplifier which can satisfy both securement of a setting space in a vicinity of a transistor and low impedance. The low distortion amplifier includes a short stub having a leading end thereof short-circuited with a high-frequency short-circuit element and a low-frequency short-circuit element, in which the short stub is connected to a vicinity of at least one of a gate terminal and a drain terminal of the transistor, and includes a plurality of branched lines, the plurality of branched lines each having a leading end thereof short-circuited with the high-frequency short-circuit element and the low-frequency short-circuit element.

    摘要翻译： 提供了一种能够满足晶体管附近的设定空间的固定和低阻抗的低失真放大器。 低失真放大器包括其短端与高频短路元件和低频短路元件短路的短路短路短路短路元件，短路短路元件与短路短路元件的至少一个 晶体管的栅极端子和漏极端子，并且包括多条分支线路，所述多条分支线路的前端与高频短路元件和低频短路元件短路 元件。

    POWER AMPLIFICATION DEVICE
    4.
    发明公开
    POWER AMPLIFICATION DEVICE 审中-公开
    性能增益设置

    公开(公告)号：EP2101409A1

    公开(公告)日：2009-09-16

    申请号：EP07850128.5

    申请日：2007-12-05

    申请人： Mitsubishi Electric Corporation

    发明人： YAMAUCHI, Kazuhisa ,  SAKAI, Yuji ,  FUJISAKI, Koichi ,  INOUE, Akira

    IPC分类号： H03F1/07 ,  H03F3/24

    CPC分类号： H03F1/0238 ,  H03F1/0244 ,  H03F1/0288

    摘要： Provided is a power amplification device including: a DC power supply that outputs a drain voltage; a Doherty amplifier including a carrier amplifier and a peak amplifier, which are connected in parallel, and amplifies an RF signal; a voltage control circuit that outputs a first instruction to output a low voltage when an output power is equal to or lower than a given value, and outputs a second instruction to output a high voltage when the output power is larger than the given value; and a voltage converter circuit that converts the drain voltage to a voltage lower than the drain voltage and applies the converted voltage to drain terminals of the carrier amplifier and the peak amplifier according to the first instruction, and applies the drain voltage directly to the drain terminals of the carrier amplifier and the peak amplifier according to the second instruction.

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
    5.
    发明公开
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：EP2562799A1

    公开(公告)日：2013-02-27

    申请号：EP10850226.1

    申请日：2010-04-22

    申请人： Mitsubishi Electric Corporation

    发明人： OISHI, Toshiyuki ,  OTSUKA, Hiroshi ,  YAMANAKA, Koji ,  INOUE, Akira

    IPC分类号： H01L21/338 ,  H01L29/778 ,  H01L29/812

    CPC分类号： H01L29/7787 ,  H01L29/0657 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/42316

    摘要： In the present invention, provided is a semiconductor device, including: a GaN channel layer which is provided on a substrate and through which electrons run; a barrier layer which is provided on the GaN channel layer and which contains at least one of In, Al, and Ga and contains N; a gate electrode which is provided on the barrier layer; and a source electrode and a drain electrode which are provided on the substrate across the gate electrode, in which, in a portion of the barrier layer between the gate electrode and the drain electrode, a magnitude of polarization of the barrier layer is smaller on the gate electrode side than on the drain electrode side. Thus, PAE can be improved by reducing Rd and Cgd simultaneously.

    摘要翻译： 在本发明中，提供了一种半导体器件，包括：GaN沟道层，其设置在衬底上并且电子通过所述GaN沟道层; 设置在所述GaN沟道层上并包含In，Al和Ga中的至少一种且包含N的阻挡层; 设置在阻挡层上的栅电极; 以及源电极和漏电极，所述源电极和漏电极隔着所述栅电极设置在所述衬底上，其中，在所述栅电极和所述漏电极之间的所述势垒层的一部分中，所述势垒层的偏振幅度在所述 栅电极侧比漏电极侧。 因此，可以通过同时减少Rd和Cgd来改善PAE。