公开(公告)号：EP2183747A1

公开(公告)日：2010-05-12

申请号：EP08783176.4

申请日：2008-07-07

申请人： Mosaid Technologies Incorporated

发明人： OH, Hakjune

IPC分类号： G11C7/10 ,  G11C16/06 ,  G11C7/22 ,  G11C8/00

CPC分类号： G11C7/1078 ,  G11C7/109 ,  G11C7/22 ,  G11C16/102 ,  G11C2207/107 ,  G11C2216/30

摘要： In an embodiment, a memory device comprises memory, a first data link, a first input, a second input, a second data link, a first output and a second output. The first data link is configured to input one or more packets into the memory device. The first input is configured to input command strobe signals into the memory device that delineate command packets that are input into the memory device via the first data link. The second input is configured to input data strobe signals into the memory device that delineate data packets that are input into the memory device via the first data link. The first and second outputs are configured to output the command strobe signal and data strobe signal, respectively. The second data link is configured to output packets from the memory device.

公开(公告)号：EP2223300B1

公开(公告)日：2013-09-18

申请号：EP08863853.1

申请日：2008-12-11

申请人： Mosaid Technologies Incorporated

发明人： OH, Hakjune ,  KIM, Jin-Ki ,  PYEON, Hong Beom

IPC分类号： G11C5/04 ,  G11C5/02 ,  H01L25/065

CPC分类号： G11C5/06 ,  G11C5/02 ,  G11C5/04 ,  H01L23/481 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/20752 ,  H01L2924/00015

摘要： A first memory device (201) and second memory device (202) have a same input/output layout configuration. To form a stack, the second memory device (202) is secured to the first memory device (201). To facilitate connectivity, the second memory device (202) is rotationally offset with respect to the first memory device (201) in the stack to align outputs (Q) of the first memory device(201) with corresponding inputs (D) of the second memory device (202). The rotational offset of the second memory device 202) with respect to the first memory device (201) aligns one or more outputs (Q) of the first memory device (201) with one or more respective inputs (D) of the second memory device (202). Based on links (311) between outputs (Q) and inputs (D) from one memory device to another in the stack, the stack of memory devices can include paths facilitating one or more series connection configurations through the memory devices.

公开(公告)号：EP2223300A1

公开(公告)日：2010-09-01

申请号：EP08863853.1

申请日：2008-12-11

申请人： Mosaid Technologies Incorporated

发明人： OH, Hakjune ,  KIM, Jin-Ki ,  PYEON, Hong Beom

IPC分类号： G11C5/06 ,  G11C16/02 ,  G11C5/02 ,  H01L23/48 ,  H01L23/52 ,  H01L23/535 ,  G11C7/10

CPC分类号： G11C5/06 ,  G11C5/02 ,  G11C5/04 ,  H01L23/481 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/20752 ,  H01L2924/00015

摘要： A first memory device (201) and second memory device (202) have a same input/output layout configuration. To form a stack, the second memory device (202) is secured to the first memory device (201). To facilitate connectivity, the second memory device (202) is rotationally offset with respect to the first memory device (201) in the stack to align outputs (Q) of the first memory device(201) with corresponding inputs (D) of the second memory device (202). The rotational offset of the second memory device 202) with respect to the first memory device (201) aligns one or more outputs (Q) of the first memory device (201) with one or more respective inputs (D) of the second memory device (202). Based on links (311) between outputs (Q) and inputs (D) from one memory device to another in the stack, the stack of memory devices can include paths facilitating one or more series connection configurations through the memory devices.

摘要翻译： 第一存储器设备（201）和第二存储器设备（202）具有相同的输入/输出布局配置。 为了形成堆叠，第二存储器装置（202）被固定到第一存储器装置（201）。 为了便于连接，第二存储器装置（202）相对于堆叠中的第一存储器装置（201）旋转地偏移，以将第一存储器装置（201）的输出（Q）与第二存储器装置 存储器设备（202）。 第二存储器设备（202）相对于第一存储器设备（201）的旋转偏移将第一存储器设备（201）的一个或多个输出（Q）与第二存储器设备（201）的一个或多个相应输入（D） （202）。 基于输出（Q）和输入（D）之间从堆叠中的一个存储器装置到另一个存储器装置的输入（D）之间的链路（311），存储器装置堆栈可包括促进通过存储器装置的一个或多个串联连接配置的路径。