公开(公告)号：EP3410470A1

公开(公告)日：2018-12-05

申请号：EP18182981.3

申请日：2006-03-20

申请人： Micron Technology, Inc.

发明人： HEMBREE, David R.

IPC分类号： H01L21/768 ,  H01L23/48 ,  H01L23/498 ,  H01L25/065 ,  B23K20/00 ,  H05K3/40

CPC分类号： H01L25/0657 ,  B23K20/004 ,  B23K20/005 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45565 ,  H01L2224/45644 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48455 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48992 ,  H01L2224/78301 ,  H01L2224/8121 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/85043 ,  H01L2224/85045 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2224/9202 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/20751 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3025 ,  H05K3/4046 ,  H05K2201/10287 ,  H05K2203/049 ,  Y10T29/49117 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49162 ,  Y10T29/49169 ,  Y10T29/53213 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A method for fabricating a semiconductor component (86) with a through wire interconnect (102) includes the step of providing a substrate (54) having a circuit side (62), a back side (64), and a through via (76). The method also includes the steps of: threading a wire (14) through the via (76), forming a contact (90) on the wire (14) on the back side (64), forming a bonded contact (92) on the wire (14) on the circuit side (62), and then severing the wire (14) from the bonded contact (92). The through wire interconnect includes (102) the wire (14) in the via (76), the contact (90) on the back side (64) and the bonded contact (92) on the circuit side (62). The contact (90) on the back side (64), and the bonded contact (92) on the circuit side (62), permit multiple components (86-1, 86-2, 86-3) to be stacked with electrical connections (170) between adjacent components. A system (120) for performing the method includes the substrate (54) with the via (76), and a wire bonder (10) having a bonding capillary (12) configured to thread the wire (14) through the via (76), and form the contact (90) and the bonded contact (92). The semiconductor component (86) can be used to form chip scale components, wafer scale components, stacked components (146), or interconnect components (861) for electrically engaging or testing other semiconductor components (156).

公开(公告)号：EP3221888A4

公开(公告)日：2018-07-11

申请号：EP15860345

申请日：2015-11-19

申请人： MICRON TECHNOLOGY INC

发明人： YE SENG KIM ,  NG HONG WAN

IPC分类号： H01L25/065 ,  G06F13/16 ,  H01L21/60 ,  H01L21/98 ,  H01L23/31 ,  H01L23/48 ,  H01L23/49 ,  H01L25/18

CPC分类号： H01L25/0657 ,  G06F13/1668 ,  G06F13/1694 ,  H01L22/14 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/04 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/03 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/13083 ,  H01L2224/1319 ,  H01L2224/16225 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/2939 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81855 ,  H01L2224/81856 ,  H01L2224/83191 ,  H01L2224/83855 ,  H01L2224/83874 ,  H01L2224/92227 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/14 ,  H01L2924/143 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/1443 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/83101 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2224/83

摘要： Memory devices with controllers under stacks of memory packages and associated systems and methods are disclosed herein. In one embodiment, a memory device is configured to couple to a host and can include a substrate, a stack of memory packages, and a controller positioned between the stack and the substrate. The controller can manage data stored by the memory packages based on commands from the host.

公开(公告)号：EP3221888A1

公开(公告)日：2017-09-27

申请号：EP15860345.6

申请日：2015-11-19

申请人： Micron Technology, Inc.

发明人： YE, Seng Kim ,  NG, Hong Wan

IPC分类号： H01L25/065 ,  H01L23/48

CPC分类号： H01L25/0657 ,  G06F13/1668 ,  G06F13/1694 ,  H01L22/14 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/04 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/03 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/13083 ,  H01L2224/1319 ,  H01L2224/16225 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/2939 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81855 ,  H01L2224/81856 ,  H01L2224/83191 ,  H01L2224/83855 ,  H01L2224/83874 ,  H01L2224/92227 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/14 ,  H01L2924/143 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/1443 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/83101 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2224/83

摘要： Memory devices with controllers under stacks of memory packages and associated systems and methods are disclosed herein. In one embodiment, a memory device is configured to couple to a host and can include a substrate, a stack of memory packages, and a controller positioned between the stack and the substrate. The controller can manage data stored by the memory packages based on commands from the host.

摘要翻译： 本文公开了具有在半导体封装堆叠下的控制器的半导体器件以及相关的系统和方法。 在一个实施例中，半导体器件包括封装衬底，附接到封装衬底的控制器以及布置在控制器上的至少两个半导体封装。 每个半导体封装包括多个半导体管芯。 半导体器件还包括封装材料，封装控制器和至少两个半导体封装。

公开(公告)号：EP3208838A1

公开(公告)日：2017-08-23

申请号：EP14889184.9

申请日：2014-10-16

申请人： Shindengen Electric Manufacturing Co., Ltd.

发明人： IKEDA Kosuke ,  MORINAGA Yuji ,  MATSUZAKI Osamu

IPC分类号： H01L23/36 ,  H01L25/07 ,  H01L25/18

CPC分类号： H01L25/0657 ,  H01L23/3735 ,  H01L23/492 ,  H01L23/49531 ,  H01L23/49833 ,  H01L24/37 ,  H01L24/40 ,  H01L25/065 ,  H01L25/074 ,  H01L2224/32135 ,  H01L2224/32141 ,  H01L2224/32145 ,  H01L2224/32151 ,  H01L2224/37147 ,  H01L2224/37599 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2225/06506 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/00014

摘要： A first circuit board having thermal conductivity; a second circuit board having thermal conductivity and disposed opposing the first circuit board; a first semiconductor element joined to an opposing surface of the first circuit board opposing the second circuit board; a second semiconductor element joined to an opposing surface of the second circuit board opposing the first circuit board; and a connector electrically connecting the first semiconductor element and the second semiconductor element. The connector includes a portion which is sandwiched between the first semiconductor element and the second circuit board without through the second semiconductor element, and which is in contact with the first semiconductor element and the second circuit board.

摘要翻译： 具有导热性的第一电路板; 具有导热性且与所述第一电路板相对设置的第二电路板; 第一半导体元件，所述第一半导体元件接合到所述第一电路板的与所述第二电路板相对的相对表面; 第二半导体元件，其接合到所述第二电路板的与所述第一电路板相对的相对表面; 以及电连接第一半导体元件和第二半导体元件的连接器。 连接器包括被夹在第一半导体元件和第二电路板之间而不经过第二半导体元件并且与第一半导体元件和第二电路板接触的部分。

公开(公告)号：EP3188221A1

公开(公告)日：2017-07-05

申请号：EP14902339.2

申请日：2014-09-23

申请人： Huawei Technologies Co., Ltd.

发明人： HUANG, An ,  LIN, Yanhai ,  LIU, Wei

IPC分类号： H01L21/60 ,  H01L23/488

CPC分类号： H01L24/49 ,  H01L23/488 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0655 ,  H01L2223/6611 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48195 ,  H01L2224/49052 ,  H01L2224/4909 ,  H01L2224/4912 ,  H01L2224/49175 ,  H01L2225/06506 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2924/20657 ,  H01L2224/45099

摘要： The present invention provides a radio frequency power component, including a first section, a second section, and a first bonding wire group, where the first bonding wire group includes at least three first bonding wire units, the first bonding wire unit includes at least one arc-shaped bonding wire, one end and the other end of the first bonding wire unit are electrically connected to electrodes of the first section and the second section, respectively, where arc heights of first bonding wire units located at two sides of the first bonding wire group are higher than an arc height of a first bonding wire unit at another position, and an arc height of a first bonding wire unit located in a central area of the first bonding wire group is lower than an arc height of a first bonding wire unit at another position, so that currents passing through the at least three first bonding wire units are the same, or a phase difference between currents passing through any two first bonding wire units is less than a preset threshold. The present invention significantly reduces an energy loss of the radio frequency power component, avoids damage to a section, and reduces a usage cost.

摘要翻译： 本发明提供一种射频功率器件，包括第一部分，第二部分和第一焊线组，所述第一焊线组包括至少三个第一焊线单元，所述第一焊线单元包括至少一个 所述第一焊线单元的一端和另一端分别与所述第一部分和所述第二部分的电极电连接，所述第一焊线单元位于所述第一焊线两侧的电弧高度 所述第一焊线组的第一焊线单元的弧高高于第一焊线单元在另一位置的弧高，且位于所述第一焊线组的中心区域的第一焊线单元的弧高小于第一焊线的弧高 单元设置在另一位置处，使得流过所述至少三个第一焊线单元的电流相同，或者流过任意两个第一焊线单元的电流之间的相位差 小于预设的阈值。 本发明显着降低了射频功率器件的能量损失，避免了对部分的损坏，降低了使用成本。

公开(公告)号：EP3050101A4

公开(公告)日：2017-05-24

申请号：EP13894419

申请日：2013-09-27

申请人： INTEL CORP

发明人： ZHAO JUNFENG

IPC分类号： H01L25/00 ,  H01L21/50 ,  H01L21/56 ,  H01L23/00 ,  H01L23/48 ,  H01L23/52 ,  H01L25/065

CPC分类号： H01L25/0657 ,  H01L21/50 ,  H01L21/565 ,  H01L23/49816 ,  H01L24/19 ,  H01L24/96 ,  H01L25/00 ,  H01L25/50 ,  H01L2224/12105 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73217 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/92144 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2224/32225

摘要： A method for making a semiconductor device includes forming rims on first and second dice. The rims extend laterally away from the first and second dice. The second die is stacked over the first die, and one or more vias are drilled through the rims after stacking. The semiconductor device includes redistribution layers extending over at least one of the respective first and second dice and the corresponding rims. The one or more vias extend through the corresponding rims, and the one or more vias are in communication with the first and second dice through the rims.

摘要翻译： 制造半导体器件的方法包括在第一和第二管芯上形成边缘。 轮缘横向延伸离开第一和第二骰子。 将第二模具堆叠在第一模具上，并且在堆叠之后通过边缘钻出一个或多个通孔。 该半导体器件包括在相应的第一和第二管芯以及对应的边缘中的至少一个上延伸的再分配层。 一个或多个通孔延伸穿过对应的边缘，并且一个或多个通孔通过边缘与第一和第二管芯连通。

公开(公告)号：EP3067928A3

公开(公告)日：2016-11-30

申请号：EP16155798.8

申请日：2016-02-16

申请人： MediaTek, Inc

发明人： KUO, Che-Hung ,  CHEN, Ying-Chih ,  CHOU, Che-Ya

IPC分类号： H01L25/16 ,  H01L25/065 ,  H01L23/31

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/06 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05554 ,  H01L2224/06135 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48265 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/16235 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00

摘要： The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first substrate (200). A first semiconductor die (300) is disposed on the first substrate. A passive device (400) is located directly on the first semiconductor die. The passive device is disposed within a boundary of the first semiconductor die in a plan view.

摘要翻译： 本发明提供了一种半导体封装组件。 该半导体封装组件包括第一基板（200）。 第一半导体管芯（300）设置在第一基板上。 无源器件（400）直接位于第一半导体管芯上。 无源器件在平面图中布置在第一半导体管芯的边界内。

公开(公告)号：EP3093886A1

公开(公告)日：2016-11-16

申请号：EP16166286.1

申请日：2016-04-20

申请人： Honeywell International Inc.

发明人： KATTI, Romney R. ,  TUCKER, James L.

IPC分类号： H01L25/065 ,  H01L25/00

CPC分类号： H01L23/49575 ,  H01L21/4825 ,  H01L21/4871 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49568 ,  H01L23/552 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/80 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04 ,  H01L2224/04042 ,  H01L2224/05647 ,  H01L2224/06135 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48472 ,  H01L2224/49109 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/80203 ,  H01L2224/80447 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/8148 ,  H01L2224/81484 ,  H01L2224/81801 ,  H01L2224/83801 ,  H01L2224/85424 ,  H01L2224/85439 ,  H01L2224/85447 ,  H01L2224/8548 ,  H01L2224/85484 ,  H01L2224/92165 ,  H01L2224/9222 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06537 ,  H01L2225/06562 ,  H01L2225/06575 ,  H01L2225/06589 ,  H01L2225/06593 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/1435 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/32145 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2224/80 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/32245 ,  H01L2224/48247

摘要： A stacked integrated circuit (IC) system including a substrate, a contour support, and a first and second IC dies. The contour support including a first support frame attached to the substrate defining a first lateral contact surface substantially orthogonal to the substrate, a support plate on the first support frame substantially parallel to the substrate, and a second support frame on the support plate defining a second lateral contact surface substantially orthogonal to the substrate, with the first and second lateral contact surfaces laterally offset from each other. The first integrated circuit die with a side abutting the first lateral contact surface, the second integrated circuit die with a side abutting the second lateral contact surface such that at least a portion of the support plate is between the first and second integrated circuit dies.

摘要翻译： 一种堆叠集成电路（IC）系统，包括基板，轮廓支撑以及第一和第二IC芯片。 所述轮廓支撑件包括附接到所述基底的第一支撑框架，所述第一支撑框架限定基本上垂直于所述基底的第一横向接触表面，所述第一支撑框架上基本上平行于所述基底的支撑板，以及在所述支撑板上的第二支撑框架， 基本上垂直于基板的横向接触表面，其中第一和第二横向接触表面彼此横向偏移。 所述第一集成电路管芯具有邻接所述第一侧面接触面的一侧，所述第二集成电路管芯具有与所述第二侧面接触表面邻接的一侧，使得所述支撑板的至少一部分位于所述第一和第二集成电路管芯之间。

公开(公告)号：EP2769411A1

公开(公告)日：2014-08-27

申请号：EP12787211.7

申请日：2012-10-16

申请人： Invensas Corporation

发明人： CHAU, Ellis ,  CO, Reynaldo ,  ALATORRE, Roseann ,  DAMBERG, Philip ,  WANG, Wei-shun ,  YANG, Se, Young ,  ZHAO, Zhijun

IPC分类号： H01L25/10 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L21/48

CPC分类号： H01L24/85 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49517 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/16 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48997 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/851 ,  H01L2224/8518 ,  H01L2224/85399 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1715 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/3511 ,  H05K3/3436 ,  H05K2201/10515 ,  H05K2201/1053 ,  Y10T29/49149 ,  Y10T29/49151 ,  H01L2224/45664 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076

摘要： A microelectronic package can include wire bonds having bases bonded to respective ones of conductive elements exposed at a surface of a substrate. The wire bonds may have exterior edge surfaces disposed at an angle between 25° and 90° relative to the bases, and ends remote, e.g., opposite, from the bases, and remote from the ends which are connected to the bases. A dielectric encapsulation layer extends from the substrate and covers portions of the wire bonds such that covered portions of the wire bonds are separated from one another by the encapsulation layer, wherein unencapsulated portions of the wire bonds are defined by portions of the wire bonds that are uncovered by the encapsulation layer, the unencapsulated portions including the ends of the wire bonds.

摘要翻译： 微电子封装可以包括引线键合，其具有结合到在衬底的表面上暴露的导电元件的相应导体的基底。 线接合可以具有相对于基部以25°至90°之间的角度设置的外部边缘表面，并且远离基部远离，例如相对，并远离连接到基座的端部。 电介质封装层从衬底延伸并覆盖引线接合的部分，使得引线键合的被覆部分通过封装层彼此分离，其中引线键合的未封装部分由引线键的部分限定， 被封装层未覆盖，未包封的部分包括引线的端部。

公开(公告)号：EP2764549A2

公开(公告)日：2014-08-13

申请号：EP12791307.7

申请日：2012-09-26

申请人： Invensas Corporation

发明人： CRISP, Richard, Dewitt ,  ZOHNI, Wael ,  HABA, Belgacem ,  LAMBRECHT, Frank

IPC分类号： H01L25/065 ,  H01L23/49 ,  H01L23/13 ,  G11C5/02 ,  G11C5/06 ,  H01L25/10

CPC分类号： G11C5/02 ,  G11C5/04 ,  G11C5/063 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/24 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/0557 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49113 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/10161 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3011 ,  H05K1/181 ,  H05K2201/09227 ,  H05K2201/10159 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A microelectronic element (101) having memory storage array function has a front face (105) facing away from a substrate (102) of a microelectronic package (100), and is electrically connected with the substrate (102) through conductive structure (112) extending above the front face (105). First and second sets (114, 124) of first terminals are exposed at a surface (110) of the substrate (102) on respective first and second sides of a theoretical axis (132), each set configured to carry address information usable to determine an addressable memory location of a memory storage array of the microelectronic element. Signal assignments of the first terminals in the first set are a mirror image of the signal assignments of the first terminals in the second set.

摘要翻译： 具有存储器存储阵列功能的微电子元件（101）具有从微电子封装（100）的衬底（102）的面向远离前表面（105），并且电通过导电结构（112）的基板连接上述延伸 前表面（105）。 第一端子（104），在第一和第二组（114，124）上的理论轴线（132）的respectivement第一和第二相对侧上设置在位置被布置。 各组的第一端子被配置成携带可用于微电子元件的存储器storageArray的可寻址存储器位置的确定性矿地址信息。 在所述第一组（114）所述第一终端具有信号分配哪些是所述第一终端的所述第二组（124）的信号分配的镜像。