公开(公告)号：EP0732739A1

公开(公告)日：1996-09-18

申请号：EP96301377.6

申请日：1996-02-29

申请人： NORTHERN TELECOM LIMITED

发明人： Ayliffe, Peter John ,  Harrison, Paul Mark ,  Geear, Martine Christopher ,  Parker, James Wilson ,  Peall, Robert George ,  Harcourt, Roger William

IPC分类号： H01L23/14 ,  H01L21/48

CPC分类号： H01L25/50 ,  G02B6/43 ,  H01L23/13 ,  H01L23/147 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： This disclosure relates to the fabrication of components on a single crystal substrate. A method is disclosed of overcoming the problems encountered in defining etched features on a silicon substrate. In particular, there is disclosed a method of producing a multichip module comprising a silicon substrate having surface features for the placement of components. An organic dielectric is applied to the substrate prior to the use of an etchant whereby interconnects can be defined.

摘要翻译： 本公开涉及在单晶衬底上制造组件。 公开了一种克服在硅衬底上限定蚀刻特征时遇到的问题的方法。 特别地，公开了一种制造多芯片组件的方法，该多芯片组件包括具有用于放置部件的表面特征的硅衬底。 在使用蚀刻剂之前，将有机电介质施加到衬底上，从而可以定义互连。

公开(公告)号：EP0636912B1

公开(公告)日：1998-05-06

申请号：EP94305060.9

申请日：1994-07-11

申请人： NORTHERN TELECOM LIMITED

发明人： Ayliffe, Peter John ,  Peall, Robert George ,  Parker, James Wilson ,  Bertolini, Stefaro ,  Harrison, Paul Mark ,  Geear, Martin Christopher

IPC分类号： G02B6/42

CPC分类号： G02B6/4232 ,  G02B6/42 ,  G02B6/423

公开(公告)号：EP0517369A2

公开(公告)日：1992-12-09

申请号：EP92303982.0

申请日：1992-05-01

申请人： NORTHERN TELECOM LIMITED

发明人： Parker, James Wilson ,  Harrison, Paul Mark ,  Peall, Robert George

IPC分类号： H01L21/60 ,  H01L25/16 ,  H01S3/025

CPC分类号： G02B6/4249 ,  G02B6/4219 ,  G02B6/4232 ,  H01L24/11 ,  H01L25/167 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01054 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： A process for use in manufacturing opto-electronic components in opto-electronic hybrid module form. V-grooves (42) are provided by anisotropic etching techniques in a silicon substrate (41). Electrical ground planes (43) and interconnects (46, 49) are provided on dielectric layers (44, 50) with interconnections between them by way of vias (45, 51). Solder wettable pads (52) are provided on the outermost dielectric layer (50). Solder bumps (54) for use in a flip-chip bonding technique are provided by a wet forward technique. Components such as a laser array (30) are bonded to the solder bumps in accurate alignment therewith.

摘要翻译： 用于制造光电混合模块形式的光电元件的工艺。 V型槽（42）通过各向异性蚀刻技术在硅衬底（41）中提供。 电接地平面（43）和互连（46,49）通过通孔（45,51）设置在电介质层（44,50）之间，并在它们之间具有互连。 焊料可湿性垫（52）设置在最外层电介质层（50）上。 用于倒装芯片接合技术的焊接凸块（54）通过湿法技术提供。 诸如激光器阵列（30）的部件与其正确对准地焊接到焊料凸块上。

公开(公告)号：EP0739146A2

公开(公告)日：1996-10-23

申请号：EP96302294.2

申请日：1996-04-01

申请人： NORTHERN TELECOM LIMITED

发明人： Parker, James Wilson ,  Munter, Ernst August

IPC分类号： H04Q3/68

CPC分类号： H04Q3/68

摘要： A telecommunications switch has a matrix architecture of n × m bus-interconnected (33,34), or space-switch interconnected (74), switch nodes (30) together with additional switch nodes (30) and n × m switch peripherals (50) connected to the switch nodes externally of the bus (space-switch) interconnected switch node matrix. Fault protection redundancy is provided by providing each one of the peripherals with connections to two different switch nodes only one of which is enabled at any one time.

摘要翻译： 电信交换机具有nxm总线互连（33,34）或空间交换机互连（74），交换节点（30）以及连接到所述交换机节点（30）和nxm交换机外围设备（50）的矩阵体系结构。 交换节点外部总线（空间交换机）互连交换机节点矩阵。 通过为每个外围设备提供与两个不同交换机节点的连接，其中只有一个在任何一个时间启用，提供故障保护冗余。

公开(公告)号：EP0517369A3

公开(公告)日：1993-02-24

申请号：EP92303982.0

申请日：1992-05-01

申请人： NORTHERN TELECOM LIMITED

发明人： Parker, James Wilson ,  Harrison, Paul Mark ,  Peall, Robert George

IPC分类号： H01L21/60 ,  H01L25/16 ,  H01S3/025

CPC分类号： G02B6/4249 ,  G02B6/4219 ,  G02B6/4232 ,  H01L24/11 ,  H01L25/167 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01054 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： A process for use in manufacturing opto-electronic components in opto-electronic hybrid module form. V-grooves (42) are provided by anisotropic etching techniques in a silicon substrate (41). Electrical ground planes (43) and interconnects (46, 49) are provided on dielectric layers (44, 50) with interconnections between them by way of vias (45, 51). Solder wettable pads (52) are provided on the outermost dielectric layer (50). Solder bumps (54) for use in a flip-chip bonding technique are provided by a wet forward technique. Components such as a laser array (30) are bonded to the solder bumps in accurate alignment therewith.

公开(公告)号：EP0517369B1

公开(公告)日：1997-04-02

申请号：EP92303982.0

申请日：1992-05-01

申请人： NORTHERN TELECOM LIMITED

发明人： Parker, James Wilson ,  Harrison, Paul Mark ,  Peall, Robert George

IPC分类号： H01L21/60 ,  H01L25/16 ,  H01S3/025

CPC分类号： G02B6/4249 ,  G02B6/4219 ,  G02B6/4232 ,  H01L24/11 ,  H01L25/167 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01054 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

公开(公告)号：EP0636912A1

公开(公告)日：1995-02-01

申请号：EP94305060.9

申请日：1994-07-11

申请人： NORTHERN TELECOM LIMITED

发明人： Ayliffe, Peter John ,  Peall, Robert George ,  Parker, James Wilson ,  Bertolini, Stefaro ,  Harrison, Paul Mark ,  Geear, Martin Christopher

IPC分类号： G02B6/42

CPC分类号： G02B6/4232 ,  G02B6/42 ,  G02B6/423

摘要： A method of making a multilayer printed circuit upon a single crystal substrate (10) for the mounting thereon of a semiconductor laser (17) and an optical fibre pigtail (18) located in a crystallographically etched groove (23) in the substrate wherein all the photolithographic processing required to create the multilayer printed circuit is performed prior to the etching of the groove.

摘要翻译： 在单个晶体衬底（10），用于半导体激光器（17）的安装在其上并在位于在基板的晶体蚀刻槽（23）的光纤尾纤（18）一种制造多层印刷电路的方法worin所有 创建的多层印刷电路所需的光刻处理槽的蚀刻之前进行。