公开(公告)号：EP2297859A1

公开(公告)日：2011-03-23

申请号：EP09762139.5

申请日：2009-06-09

申请人： NXP B.V.

发明人： DILONARDO, Angelo Raffaele ,  ENGIN, Nur

IPC分类号： H03M13/27 ,  H03M13/29

CPC分类号： H03M13/2775 ,  H03M13/2739 ,  H03M13/2753 ,  H03M13/2764 ,  H03M13/2957 ,  H03M13/6519 ,  H03M13/6525 ,  H03M13/6544

摘要： A data processing system, a turbo decoding system, an address generator and a method of reconfiguring a turbo decoding method is provided. The data processing system (101) comprises the turbo decoding system (100). The turbo decoding system (100) comprises electronic circuits. The electronic circuits comprises: a memory (108), the address generator (102), and a Soft Input Soft Output decoder (106). The address generator (102) is operative to produce a sequence of addresses according to an interleaving scheme. The address generator can support multiple interleaving schemes. The address generator (102) is operative to receive reconfiguration information. The address generator (102) is operative to reconfigure during operational use the interleaving scheme in dependency on the reconfiguration information.