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公开(公告)号：EP3309788A1
公开(公告)日：2018-04-18
申请号：EP17181975.8
申请日：2017-07-18
申请人： NXP USA, Inc.
CPC分类号： G11C11/1673 , G11C7/06 , G11C7/062 , G11C11/16 , G11C11/1655 , G11C11/1693 , G11C13/0026 , G11C13/004 , G11C13/0061 , G11C2013/0042 , G11C2013/0054 , G11C2013/0057
摘要： In one embodiment, a sense amplifier circuit includes two current paths. Each path includes a transistor configured as a current source during a memory read operation and a second transistor. During the first phase of a memory read operation, the first current path is coupled to one cell and the second current path is coupled to a second cell. The sense amplifier circuit includes a capacitor that during a first phase of a memory read operation, is coupled between two corresponding nodes of the two paths to store a voltage difference between the two nodes. During the second phase, the cell/current path couplings are swapped and the capacitor is coupled to the control terminal of one of the second transistors to control the conductivity of the transistor for adjusting a voltage of an output node to indicate the value of the data being read.
摘要翻译： 在一个实施例中，读出放大器电路包括两个电流路径。 每个路径包括在存储器读取操作期间被配置为电流源的晶体管和第二晶体管。 在存储器读取操作的第一阶段期间，第一电流路径耦合到一个单元并且第二电流路径耦合到第二单元。 读出放大器电路包括电容器，该电容器在存储器读取操作的第一阶段期间耦合在两个路径的两个对应节点之间以存储两个节点之间的电压差。 在第二阶段期间，单元/电流路径耦合被交换，并且电容器被耦合到第二晶体管之一的控制端子以控制晶体管的电导率以调整输出节点的电压以指示数据的值 正在阅读。
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公开(公告)号：EP3301679A1
公开(公告)日：2018-04-04
申请号：EP17172601.1
申请日：2017-05-23
申请人： NXP USA, Inc.
摘要： A sense amplifier circuit includes a sampling capacitor coupled to the input of an inverting amplifier. The output of the inverting amplifier is coupled to a transistor that includes a current terminal. The memory read operation includes two phases. During a first phase, a terminal of the capacitor is coupled to a first cell. During a second phase, the terminal of the capacitor is coupled a second cell.
摘要翻译： 读出放大器电路包括耦合到反相放大器的输入端的采样电容器。 反相放大器的输出耦合到包括电流端子的晶体管。 存储器读取操作包括两个阶段。 在第一阶段期间，电容器的端子耦合到第一单元。 在第二阶段期间，电容器的端子被耦合到第二单元。
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公开(公告)号：EP3203480A1
公开(公告)日：2017-08-09
申请号：EP16196042.2
申请日：2016-10-27
申请人： NXP USA, Inc.
CPC分类号： H03K17/08122 , G11C27/024 , H03K17/102
摘要： A voltage switch for handling negative voltages includes an input terminal coupled to a voltage that is greater than a voltage rating of oxide in the voltage switch, a top capacitor plate pre-charge module including three cascoded p-channel transistors coupled between a supply voltage and a top plate of a capacitor, a bottom capacitor plate pre-charge module including two cascoded n-channel transistors coupled between a bottom plate of the capacitor and ground, and an output voltage module including an output terminal and four cascoded n-channel transistors with control electrodes of a first and fourth of the cascoded n-channel transistors coupled to a boost node. Control electrodes of a second and third of the cascoded n-channel transistors coupled to the top plate of the capacitor. A voltage switch for positive voltages is also disclosed.
摘要翻译： 用于处理负电压的电压开关包括耦合到大于电压开关中的氧化物的电压额定值的电压的输入端子，顶部电容器板预充电模块，其包括耦合在电源电压和电源电压之间的三个级联p沟道晶体管， 电容器的顶板，底部电容器板预充电模块，其包括耦合在电容器的底板和地之间的两个级联的n沟道晶体管，以及包括输出端子和四个级联的n沟道晶体管的输出电压模块， 控制耦合到升压节点的第一和第四级联n沟道晶体管的电极。 第二和第三级联n沟道晶体管的控制电极耦合到电容器的顶板。 还公开了用于正电压的电压开关。
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