公开(公告)号：EP2412027A1

公开(公告)日：2012-02-01

申请号：EP10756486.6

申请日：2010-03-25

申请人： National Semiconductor Corporation

发明人： BULUCEA, Constantin ,  BAHL, Sandeep, R. ,  FRENCH, William, D. ,  ARCHER, Donald, M. ,  PARKER, D., Courtney ,  CHAPARALA, Prasad ,  Yang, Jeng-Jiun

IPC分类号： H01L29/78

CPC分类号： H01L27/088 ,  H01L21/26513 ,  H01L21/2652 ,  H01L21/2658 ,  H01L21/26586 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/518 ,  H01L29/665 ,  H01L29/66659 ,  H01L29/7835

摘要： A semiconductor structure, which serves as the core of a semiconductor fabrication platform, has a combination of empty-well regions and filled-well regions variously used by electronic elements, particularly insulated-gate field-effect transistors (IGFETs), to achieve desired electronic characteristics. A relatively small amount of semiconductor well dopant is near the top of an empty well. A considerable amount of semiconductor well dopant is near the top of a filled well. Some IGFETs (100, 102, 112, 114, 124, and 126) utilize empty wells (180, 182, 192, 194, 204, and 206) in achieving desired transistor characteristics. Other IGFETs (108, 110, 116, 118, 120, and 122) utilize filled wells (188, 190, 196, 198, 200, and 202) in achieving desired transistor characteristics. The combination of empty and filled wells enables the semiconductor fabrication platform to provide a wide variety of high-performance IGFETs from which circuit designers can select particular IGFETs for various analog and digital applications, including mixed-signal applications.

公开(公告)号：EP2412017A1

公开(公告)日：2012-02-01

申请号：EP10756494.0

申请日：2010-03-25

申请人： National Semiconductor Corporation

发明人： CHAPARALA, Prasad ,  PARKER, D., Courtney

IPC分类号： H01L21/70 ,  H01L29/02 ,  H01L29/10

CPC分类号： H01L29/7835 ,  H01L21/26513 ,  H01L21/2652 ,  H01L21/2658 ,  H01L21/26586 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823892 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/518 ,  H01L29/665 ,  H01L29/66659

摘要： An insulated-gate field-effect transistor (110, 114, or 122) is fabricated so that its gate dielectric layer (500, 566, or 700) contains nitrogen having a vertical concentration profile specially tailored to prevent boron in the overlying gate electrode (502, 568, or 702) from significantly penetrating through the gate dielectric layer into the underlying channel zone (484, 554, or 684) while simultaneously avoiding the movement of nitrogen from the gate dielectric layer into the underlying semiconductor body. Damage which could otherwise result from undesired boron in the channel zone and from undesired nitrogen in the semiconductor body is substantially avoided.