公开(公告)号：EP3331110B1

公开(公告)日：2020-01-15

申请号：EP16830060.6

申请日：2016-07-27

Applicant: Nippon Telegraph And Telephone Corporation

Inventor： KIKUCHI, Kiyofumi ,  FUKUDA, Hiroshi ,  SAIDA, Takashi ,  KAMEI, Shin ,  TSUZUKI, Ken

IPC: H01S5/022

公开(公告)号：EP3115813B1

公开(公告)日：2020-02-26

申请号：EP15757973.1

申请日：2015-03-04

Applicant: Nippon Telegraph and Telephone Corporation

Inventor： KAMEI, Shin ,  JIZODO, Makoto ,  FUKUDA, Hiroshi ,  KIKUCHI, Kiyofumi

IPC: G02B6/126 ,  G02B6/122 ,  G02B6/12

公开(公告)号：EP3313156A1

公开(公告)日：2018-04-25

申请号：EP16811249.8

申请日：2016-06-17

Applicant: Nippon Telegraph and Telephone Corporation

Inventor： USUI, Mitsuo ,  KIKUCHI, Kiyofumi ,  TSUZUKI, Ken ,  FUKUDA, Hiroshi ,  ASAKAWA, Shuichiro ,  KAMEI, Shin ,  SOMA, Shunichi ,  SAIDA, Takashi

IPC: H05K1/14 ,  H05K1/11 ,  H05K3/36

CPC classification number: H05K3/363 ,  H05K1/0269 ,  H05K1/11 ,  H05K1/111 ,  H05K1/117 ,  H05K1/14 ,  H05K1/147 ,  H05K1/189 ,  H05K3/3463 ,  H05K3/36 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/09409 ,  H05K2201/10121

Abstract: In a conventional soldering method, an FPC-side electrode pad and a package-side electrode pad are closely joined together with a solder layer, and the soldered state after a joining process has not been easily confirmed visually. Since a conduction inspection on wirings by measuring resistance values, for example, for an electric path including a joint portion needs to be made, quite a long time has been required for the inspection. The present invention provides a solder joint structure including a side face electrode which is formed on each of the side faces of the end parts of an FPC board and a package or PCB board that are to be soldered, extending vertically relative to the faces constituting each of electrode pads on the boards , and which introduces solder. On the side face electrodes of the board end parts, a part of solder that is formed continuously from the solder joint portion is visible and the state of the solder joint between the electrode pads on the two boards can be confirmed. The efficiency of solder joint tests can be improved by providing an electrode pad configuration which allows to form solder joint portions that are sufficiently visible from the side faces of the boards.

Abstract translation: 在传统的焊接方法中，FPC侧电极焊盘和封装侧电极焊盘通过焊料层紧密接合在一起，并且接合工艺之后的焊接状态不容易在视觉上确认。 由于需要通过测量电阻值来进行布线的导通检查，例如对于包括接头部分的电气路径，所以检查需要相当长的时间。 本发明提供了一种钎焊接合结构，其包括形成在FPC板的端部的每个侧面上的侧面电极和待焊接的封装或PCB板，所述侧面电极相对于构成每个 电路板上的电极焊盘，并引入焊料。 在电路板端部的侧面电极上，从焊接部分连续形成的焊料的一部分是可见的，并且可以确认两个电路板上的电极焊盘之间的焊接状态。 通过提供允许形成从板的侧面足够可见的焊点部分的电极焊盘配置，可以提高焊点测试的效率。

公开(公告)号：EP3115813A1

公开(公告)日：2017-01-11

申请号：EP15757973.1

申请日：2015-03-04

Applicant: Nippon Telegraph and Telephone Corporation

Inventor： KAMEI, Shin ,  JIZODO, Makoto ,  FUKUDA, Hiroshi ,  KIKUCHI, Kiyofumi

IPC: G02B6/126 ,  G02B6/122 ,  G02B6/14

Abstract: Polarization rotators of conventional techniques require forming a silicon nitride layer, which is not employed in usual fabrication of a silicon waveguide circuit. In order to employ a polarization rotator function in an optical integrated circuit, a process of forming a silicon nitride layer is added just for that purpose. This increases the fabrication time and complicates the fabrication equipment. In a polarization rotator of the present invention, the waveguide width of a center core portion of a polarization converter (104) is made small. Thus, the intensity of an optical wave does not concentrate only at the center core portion and is more influenced by structural asymmetry. With the configuration of the polarization rotator of the present invention, it is possible to efficiently cause polarization conversion with a structure including only a silicon waveguide and no silicon nitride layer or the like formed thereon.

Abstract translation: 常规技术的极化旋转器需要形成氮化硅层，其不用于通常制造硅波导电路。 为了在光学集成电路中采用偏振旋转器功能，仅为此目的增加形成氮化硅层的工艺。 这增加了制造时间并使制造设备复杂化。 在本发明的偏振旋转器中，极化转换器（104）的中心芯部的波导宽度变小。 因此，光波的强度不仅集中在中心芯部分，而且更受到结构不对称的影响。 利用本发明的偏振旋转器的结构，可以通过仅形成硅波导并且不形成氮化硅层等的结构，有效地引起偏振变换。

公开(公告)号：EP3331110A1

公开(公告)日：2018-06-06

申请号：EP16830060.6

申请日：2016-07-27

Applicant: Nippon Telegraph And Telephone Corporation

Inventor： KIKUCHI, Kiyofumi ,  FUKUDA, Hiroshi ,  SAIDA, Takashi ,  KAMEI, Shin ,  TSUZUKI, Ken

IPC: H01S5/022

CPC classification number: H04B3/32 ,  H01P3/081 ,  H01R13/6466 ,  H01S5/022 ,  H05K1/0228

Abstract: The present invention provides an optical module that suppresses crosstalk between high-frequency transmission lines. The optical module of the present invention includes at least one set of: an optical port; an optical processing circuit optically connected to the optical port; an electro-optical transducer optically connected to the optical processing circuit; two or more high-frequency transmission lines connected to the electro-optical transducer; and electrical ports connected to the high-frequency transmission lines, and includes a conductive cover block which is provided above the high-frequency transmission lines so as to at least partly cover the high-frequency transmission lines and which is grounded.

公开(公告)号：EP3306386A1

公开(公告)日：2018-04-11

申请号：EP16802791.0

申请日：2016-05-27

Applicant: Nippon Telegraph And Telephone Corporation

Inventor： KAMEI, Shin ,  JIZODO, Makoto ,  FUKUDA, Hiroshi ,  KIKUCHI, Kiyofumi ,  TSUZUKI, Ken

IPC: G02F2/00 ,  G02B6/00 ,  G02B6/125 ,  G02B6/126

CPC classification number: G02B6/125 ,  G02B6/00 ,  G02B6/126 ,  G02B6/2813 ,  G02F2/00 ,  G02F2/002 ,  H04J14/06

Abstract: A coherent optical mixer circuit is provided that can measure a phase error without requiring a step of cutting away a delay circuit. Odd-numbered or even-numbered two of four inputs of an 4-input-and-4-output multimode interference circuit are connected to an input mechanism. The four outputs of the multimode interference circuit are all connected to an output mechanism to the exterior. Other two inputs of the multimode interference circuit are connected to two monitor waveguides. One of the monitor waveguide is longer than the other to configure a light delay circuit. The monitor waveguides constituting the light delay circuit are connected to the respective outputs of a 2-branched light splitter. The 2-branched light splitter has an input connected to a monitor light input mechanism from the exterior via a monitor input waveguide.

Abstract translation: 提供了一种相干光混频器电路，其可以测量相位误差而不需要切除延迟电路的步骤。 4输入和4输出多模干涉电路的四个输入中的奇数或偶数两个连接到输入机构。 多模干涉电路的四个输出都连接到输出机构的外部。 多模干涉电路的其他两个输入连接到两个监测波导。 监视波导中的一个比另一个长，以配置光延迟电路。 构成光延迟电路的监视器波导连接到2分支分光器的相应输出。 双分支分光器的输入通过监视器输入波导从外部连接到监视器光输入机构。

公开(公告)号：EP3285420B1

公开(公告)日：2020-05-06

申请号：EP16779767.9

申请日：2016-04-12

Applicant: Nippon Telegraph and Telephone Corporation

Inventor： KAMEI, Shin ,  JIZODO, Makoto ,  FUKUDA, Hiroshi ,  KIKUCHI, Kiyofumi ,  TSUZUKI, Ken

IPC: H04J14/00 ,  H01S5/022 ,  H04B10/516 ,  H04J14/04 ,  H04J14/06 ,  H04B10/532 ,  H04B10/61

公开(公告)号：EP3343641A1

公开(公告)日：2018-07-04

申请号：EP16841106.4

申请日：2016-08-26

Applicant: Nippon Telegraph and Telephone Corporation

Inventor： FUKUDA, Hiroshi ,  KAMEI, Shin ,  TSUZUKI, Ken ,  JIZODO, Makoto ,  KIKUCHI, Kiyofumi

IPC: H01L31/10

CPC classification number: H01L31/102 ,  H01L31/022408 ,  H01L31/0264 ,  H01L31/10

Abstract: The present invention provides a germanium photodetector which reduces a dark current without degradation of a photocurrent. The germanium photodetector includes: a silicon substrate; a lower clad layer formed on the silicon substrate; a core layer (210) formed on the lower clad layer; a p-type silicon slab (211) formed in a part of the core layer (210) and doped with a p-type impurity ion; p++ silicon electrode sections (212, 213) that are highly-doped with a p-type impurity and act as an electrode; and germanium layers (241, 242) which absorb light. The germanium photodetector further includes an upper clad layer, an n-type germanium region doped with an n-type impurity above the germanium layer, and an electrode. According to the present invention, two germanium layers (241, 242) are provided on the p-type silicon slab (211) so as to miniaturize the area of the surface of the individual germanium layer in contact with the p-type silicon slab (211), so that the dark current due to threading dislocation can be reduced.

公开(公告)号：EP3285420A1

公开(公告)日：2018-02-21

申请号：EP16779767.9

申请日：2016-04-12

Applicant: Nippon Telegraph and Telephone Corporation

Inventor： KAMEI, Shin ,  JIZODO, Makoto ,  FUKUDA, Hiroshi ,  KIKUCHI, Kiyofumi ,  TSUZUKI, Ken

IPC: H04J14/00 ,  H01S5/022 ,  H04B10/516 ,  H04J14/04 ,  H04J14/06

Abstract: A one chip-integrated digital coherent polarization multiplexing optical transmission and reception circuit with optimal optical power distribution between sending and receiving is provided by using an optical power splitter having a branching ratio of a lower asymmetry property so that the unbalanced loss depending on the polarization path can be compensated. A polarization multiplexing optical transmission and reception circuit includes a polarization multiplexing optical transmission circuit, including: the first optical power splitter for branching the optical power of continuous light outputted from a light source; one polarization optical modulation circuit at the side of a path having a higher loss connected to one output of the first optical power splitter; the second optical power splitter connected to the other output of the first optical power splitter; and the other polarization optical modulation circuit connected to one output of the second optical power splitter.

Abstract translation: 通过使用具有较低不对称性分支比的光功率分配器来提供在发送和接收之间具有最佳光功率分配的单芯片集成数字相干偏振多路复用光发送和接收电路，从而根据极化路径的不平衡损耗 可以得到补偿。 一种偏振复用光发送接收电路，包括：偏振复用光发送电路，包括：第一光功率分配器，用于分支从光源输出的连续光的光功率; 位于具有较高损耗的路径一侧的一个偏振光调制电路连接到第一光功率分配器的一个输出; 所述第二光功率分配器连接到所述第一光功率分配器的另一个输出; 而另一个偏振光调制电路连接到第二光功率分配器的一个输出端。