公开(公告)号：EP2166565A3

公开(公告)日：2010-07-07

申请号：EP09075556.2

申请日：2004-05-24

申请人： Ohmi, Tadahiro ,  Yazaki Corporation

发明人： Ohmi, Tadahiro ,  Teramoto, Akinobu ,  Akahori, Hiroshi ,  Nii, Keiichi ,  Watanabe, Takanori

IPC分类号： H01L21/336 ,  H01L29/78 ,  H01L21/316 ,  H01L21/304

CPC分类号： H01L29/7813 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L29/045 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66734

摘要： In a P-channel power MIS field effect transistor formed on a silicon surface having substantially a (110) plane, a gate insulation film is used which provides a gate-to-source breakdown voltage of 10 V or more, and planarizes the silicon surface, or contains Kr, Ar, or Xe.

摘要翻译： 在形成在基本上为（110）面的硅表面上的P沟道功率MIS场效应晶体管中，使用提供10V以上的栅极 - 源极击穿电压的栅极绝缘膜，并平坦化硅表面 ，或含有Kr，Ar或Xe。

公开(公告)号：EP2166565A2

公开(公告)日：2010-03-24

申请号：EP09075556.2

申请日：2004-05-24

申请人： Ohmi, Tadahiro ,  Yazaki Corporation

发明人： Ohmi, Tadahiro ,  Teramoto, Akinobu ,  Akahori, Hiroshi ,  Nii, Keiichi ,  Watanabe, Takanori

IPC分类号： H01L21/336 ,  H01L29/78 ,  H01L21/316 ,  H01L21/304

CPC分类号： H01L29/7813 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L29/045 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66734

摘要： In a P-channel power MIS field effect transistor formed on a silicon surface having substantially a (110) plane, a gate insulation film is used which provides a gate-to-source breakdown voltage of 10 V or more, and planarizes the silicon surface, or contains Kr, Ar, or Xe.

摘要翻译： 在形成于实质上具有（110）面的硅面上的P沟道功率MIS型场效应晶体管中，使用提供10V以上的栅极/源极间耐压的栅极绝缘膜，并使硅表面 ，或者包含Kr，Ar或Xe。

公开(公告)号：EP1628337A8

公开(公告)日：2006-10-18

申请号：EP04745284.2

申请日：2004-05-24

申请人： OHMI, Tadahiro ,  YAZAKI CORPORATION

发明人： Ohmi, Tadahiro ,  Teramoto, Akinobu ,  AKAHORI, Hiroshi ,  Nii, Keiichi ,  Watanabe, Takanori

IPC分类号： H01L21/336 ,  H01L29/78 ,  H01L21/316 ,  H01L21/304

CPC分类号： H01L29/7813 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L29/045 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66734

摘要： In a P-channel power MIS field effect transistor formed on a silicon surface having substantially a (110) plane, a gate insulation film is used which provides a gate-to-source breakdown voltage of 10 V or more, and planarizes the silicon surface, or contains Kr, Ar, or Xe.

公开(公告)号：EP1628337A1

公开(公告)日：2006-02-22

申请号：EP04745284.2

申请日：2004-05-24

申请人： OHMI, Tadahiro ,  YAZAKI CORPORATION

发明人： Ohmi, Tadahiro ,  Teramoto, Akinobu ,  AKAHORI, Hiroshi ,  Nii, Keiichi ,  Watanabe, Takanori

IPC分类号： H01L21/336 ,  H01L29/78 ,  H01L21/316 ,  H01L21/304

CPC分类号： H01L29/7813 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L29/045 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66734

摘要： In a P-channel power MIS field effect transistor formed on a silicon surface having substantially a (110) plane, a gate insulation film is used which provides a gate-to-source breakdown voltage of 10 V or more, and planarizes the silicon surface, or contains Kr, Ar, or Xe.

摘要翻译： 在形成在基本上为（110）面的硅表面上的P沟道功率MIS场效应晶体管中，使用提供10V以上的栅极 - 源极击穿电压的栅极绝缘膜，并平坦化硅表面 ，或含有Kr，Ar或Xe。

公开(公告)号：EP1427003A3

公开(公告)日：2005-03-02

申请号：EP03027739.6

申请日：2003-12-02

申请人： OHMI, Tadahiro

发明人： Ohmi, Tadahiro ,  Sugawa, Shigetoshi ,  Teramoto, Akinobu ,  Akahori, Hiroshi ,  Nii, Keiichi

IPC分类号： H01L21/306 ,  H01L21/336

CPC分类号： H01L21/3185 ,  H01L21/30604 ,  H01L21/31654 ,  H01L21/318 ,  H01L29/6659

摘要： In a semiconductor device formed on a silicon surface which has a substantial (110) crystal plane orientation, the silicon surface is flattened so that an arithmetical mean deviation of surface Ra is not greater than 0.15nm, preferably, 0.09nm, which enables to manufacture an n-MOS transistor of a high mobility. Such a flattened silicon surface is obtained by repeating a deposition process of a self-sacrifice oxide film in an oxygen radical atmosphere and a removing process of the self-sacrifice oxide film, by cleaning the silicon surface in deaerated H 2 O or a low OH density atmosphere, or by strongly terminating the silicon surface by hydrogen or heavy hydrogen. The deposition process of the self-sacrifice oxide film may be carried out by isotropic oxidation.

公开(公告)号：EP1427003A2

公开(公告)日：2004-06-09

申请号：EP03027739.6

申请日：2003-12-02

申请人： OHMI, Tadahiro

发明人： Ohmi, Tadahiro ,  Sugawa, Shigetoshi ,  Teramoto, Akinobu ,  Akahori, Hiroshi ,  Nii, Keiichi

IPC分类号： H01L21/306 ,  H01L21/336

CPC分类号： H01L21/3185 ,  H01L21/30604 ,  H01L21/31654 ,  H01L21/318 ,  H01L29/6659

摘要： In a semiconductor device formed on a silicon surface which has a substantial (110) crystal plane orientation, the silicon surface is flattened so that an arithmetical mean deviation of surface Ra is not greater than 0.15nm, preferably, 0.09nm, which enables to manufacture an n-MOS transistor of a high mobility. Such a flattened silicon surface is obtained by repeating a deposition process of a self-sacrifice oxide film in an oxygen radical atmosphere and a removing process of the self-sacrifice oxide film, by cleaning the silicon surface in deaerated H 2 O or a low OH density atmosphere, or by strongly terminating the silicon surface by hydrogen or heavy hydrogen. The deposition process of the self-sacrifice oxide film may be carried out by isotropic oxidation.

摘要翻译： 在形成于具有实质上（110）晶面取向的硅表面上的半导体器件中，硅表面被平坦化，使得表面Ra的算术平均偏差不大于0.15nm，优选为0.09nm，这能够制造 高迁移率的n-MOS晶体管。 通过重复在氧自由基气氛中的自牺牲氧化物膜的沉积过程和自牺牲氧化物膜的去除过程，通过在脱气的H 2 O或低OH密度气氛中清洁硅表面来获得这种平坦的硅表面 或者通过氢或重氢强烈地终止硅表面。 自牺牲氧化物膜的沉积过程可以通过各向同性氧化进行。

公开(公告)号：EP1617483A1

公开(公告)日：2006-01-18

申请号：EP04724878.6

申请日：2004-03-31

申请人： TOKYO ELECTRON LIMITED ,  OHMI, Tadahiro

发明人： Ohmi, Tadahiro ,  Teramoto, Akinobu ,  Wakamatsu, Hidetoshi ,  Kobayashi, Yasuo,c/o Tokyo Electron Limited

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L21/318

CPC分类号： H01L21/318 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/518

摘要： In order to provide a semiconductor device having good quality by keeping the relative permittivity of a High-K insulation film in a high state, or to provide a method for manufacturing a semiconductor device in which the relative permittivity of the High-K insulation film can be kept in a high state, a semiconductor device is disclosed that includes a silicon substrate, a gate electrode layer, and a gate insulation film between the silicon substrate and the gate electrode layer. The gate insulation film is a high relative permittivity (high-k) film being formed by performing a nitriding treatment on a mixture of a metal and silicon. The High-K film itself becomes a nitride so as to prevent SiO 2 from being formed.

摘要翻译： 为了通过将高K绝缘膜的相对介电常数保持在高状态来提供具有良好质量的半导体器件，或者提供一种半导体器件的制造方法，其中高K绝缘膜的相对介电常数可以 保持在高状态，公开了在硅衬底和栅极电极层之间包括硅衬底，栅极电极层和栅极绝缘膜的半导体器件。 栅极绝缘膜是通过对金属和硅的混合物进行氮化处理而形成的高相对介电常数（高k）膜。 高K膜本身成为氮化物，以防止形成SiO 2。