摘要:
A comparator circuit (28) compares a test pattern generated by a test pattern generator circuit (27), with a test pattern transmitted to a memory card (2) and returned from the memory card (2). A control circuit (21) determines a bandwidth corresponding to frequency components correctly transmitted between a host apparatus (1) and the memory card (2), based on the returned test pattern, and selects an encoding method requiring a maximum available bandwidth. The control circuit (21) generates a notification message indicating the selected encoding method, and encodes the notification message using the selected encoding method, and transmit the encoded notification message to the memory card (2). The control circuit (21) establishes communication between the host apparatus (1) and the memory card (2), when receiving a response message including an acknowledgement to the notification message, from the memory card (2).
摘要:
An IC package (50) includes an integrated circuit (10) for transmitting and receiving a pair of differential signals composed of a signal having positive polarity and a signal having negative polarity, a first signal terminal (41a) for transmitting the signal having positive polarity, a second signal terminal (41b) for transmitting the signal having negative polarity, and a third terminal (43) arranged between the first signal terminal and the second signal terminal. The first and second terminals are electrically connected to the integrated circuit, and the third terminal (43) is not electrically connected to the integrated circuit.
摘要:
To aim to provide an interface circuit that supports both a single-ended method and a differential method as a transmission method, and one of pairs of input terminals for a differential signal is shared to input/output a single-ended signal. A differential signal receiving circuit that receives a differential signal input through the pair of shared terminals is activated when a differential signal is input to a pair of dedicated input terminals for a differential signal, which is different from the pair of shared terminals. After the differential signal receiving circuit is activated, the active state is maintained by a built-in controller. Accordingly, the activation of the differential signal receiving circuit that receives a differential signal input through the shared terminals is controlled by controlling the differential signal input through the pair of dedicated input terminals, and furthermore, the possibility that the differential signal receiving circuit becomes inactive at an unexpected timing is reduced to a low level.