公开(公告)号：EP2137734B1

公开(公告)日：2011-11-23

申请号：EP08745261.1

申请日：2008-04-07

申请人： QUALCOMM Incorporated

发明人： JUNG, Seong-ook ,  SANI, Mehdi, Hamidi ,  KANG, Seung H. ,  YOON, Sei Seung

IPC分类号： G11C11/16

CPC分类号： G11C11/1675 ,  G11C11/1659 ,  G11C11/1673

摘要： Systems, circuits and methods for determining read and write voltages for a given word line transistor in Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) are disclosed. A first voltage can be supplied to the write operations so that the write operations occur in the saturation region (454) of the word line transistor. A second voltage, which is less than the first voltage, can be supplied for read operations so that the read operations occur in the linear region (452) of the word line transistor.

公开(公告)号：EP2092527A1

公开(公告)日：2009-08-26

申请号：EP07844616.8

申请日：2007-10-25

申请人： QUALCOMM Incorporated

发明人： JUNG, Seong-ook ,  YOON, Sei Seung ,  HAN, Yi

IPC分类号： G11C7/08 ,  G11C7/14 ,  G11C11/419 ,  G11C8/14 ,  G11C7/22

CPC分类号： G11C7/08 ,  G11C7/14 ,  G11C7/22 ,  G11C8/08 ,  G11C11/41 ,  G11C11/419 ,  G11C29/02 ,  G11C29/023 ,  G11C29/028 ,  G11C2207/065

摘要： A memory device with configurable delay tracking is described. The memory device includes M normal word line drivers, a dummy word line driver, a memory array, N sense amplifiers, and a timing control circuit. The memory array includes M rows and N columns of memory cells and a column of dummy cells. The word line drivers drive word lines for the rows of memory cells. The dummy word line driver drives a dummy word line for at least one dummy cell in the column of dummy cells. The timing control circuit generates enable signals having configurable delay, which may be obtained with an acceleration circuit that provides variable drive for a dummy bit line coupled to the column of memory cells. The sense amplifiers detect bit lines for the columns of memory cells based on the enable signals.

公开(公告)号：EP3694092A1

公开(公告)日：2020-08-12

申请号：EP20166805.0

申请日：2007-04-23

申请人： QUALCOMM Incorporated

发明人： CHUA-EOAN, Lew G. ,  ANDREEV, Boris ,  RIDDLE, Christopher C. ,  SHI, Chunlei ,  JUNG, Seong-ook ,  TOMS, Thomas R. ,  GAGNE, Justin Joseph Rosen

IPC分类号： H02M3/158 ,  H03K19/00 ,  H02M1/00

摘要： A device is disclosed that includes a first pin to supply power to a first power domain of an integrated circuit, a second pin to supply power to a second power domain of the integrated circuit and a controller, comprising a logic and a low drop out regulator. The controller is coupled to the first pin and to the second pin. The logic determines the operating mode and provides at least one control signal. The low drop out regulator is responsive to the logic to selectively reduce current flow to the second pin.

公开(公告)号：EP2025059B1

公开(公告)日：2020-05-06

申请号：EP07761131.7

申请日：2007-04-23

申请人： Qualcomm Incorporated

发明人： CHUA-EOAN, Lew G. ,  ANDREEV, Boris ,  RIDDLE, Christopher C. c/o Qualcomm Incorporated ,  SHI, Chunlei ,  JUNG, Seong-ook ,  TOMS, Thomas R. ,  GAGNE, Justin Joseph Rosen

IPC分类号： H02M3/158 ,  H03K19/00 ,  H02M1/00

公开(公告)号：EP2092527B1

公开(公告)日：2016-03-16

申请号：EP07844616.8

申请日：2007-10-25

申请人： QUALCOMM Incorporated

发明人： JUNG, Seong-ook ,  YOON, Sei Seung ,  HAN, Yi

IPC分类号： G11C8/08 ,  G11C11/41 ,  G11C29/02 ,  G11C7/08 ,  G11C7/14 ,  G11C7/22 ,  G11C11/419

CPC分类号： G11C7/08 ,  G11C7/14 ,  G11C7/22 ,  G11C8/08 ,  G11C11/41 ,  G11C11/419 ,  G11C29/02 ,  G11C29/023 ,  G11C29/028 ,  G11C2207/065

公开(公告)号：EP2137734A1

公开(公告)日：2009-12-30

申请号：EP08745261.1

申请日：2008-04-07

申请人： QUALCOMM Incorporated

发明人： JUNG, Seong-ook ,  SANI, Mehdi, Hamidi ,  KANG, Seung H. ,  YOON, Sei Seung

IPC分类号： G11C11/16

CPC分类号： G11C11/1675 ,  G11C11/1659 ,  G11C11/1673

摘要： Systems, circuits and methods for determining read and write voltages for a given word line transistor in Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) are disclosed. A first voltage can be supplied to the write operations so that the write operations occur in the saturation region (454) of the word line transistor. A second voltage, which is less than the first voltage, can be supplied for read operations so that the read operations occur in the linear region (452) of the word line transistor.

公开(公告)号：EP2025059A1

公开(公告)日：2009-02-18

申请号：EP07761131.7

申请日：2007-04-23

申请人： Qualcomm Incorporated

发明人： CHUA-EOAN, Lew G. ,  ANDREEV, Boris ,  RIDDLE, Christopher C. ,  SHI, Chunlei ,  JUNG, Seong-ook ,  TOMS, Thomas R. ,  GAGNE, Justin Joseph Rosen

IPC分类号： H03K19/00

摘要： A device is disclosed that includes a first pin to supply power to a first power domain of an integrated circuit, a second pin to supply power to a second power domain of the integrated circuit, a switching regulator and a controller. The switching regulator is coupled to the first pin to provide a first regulated power supply to the first power domain and is coupled to the second pin to provide a second regulated power supply to the second power domain. The controller is coupled to the first pin and to the second pin to selectively reduce current flow to at least the second pin during a low power event.

摘要翻译： 公开了一种器件，其包括：向集成电路的第一电源域供电的第一引脚，向集成电路的第二电源域供电的第二引脚，开关稳压器和控制器。 开关稳压器耦合到第一引脚以向第一功率域提供第一稳压电源，并且耦合到第二引脚以向第二功率域提供第二稳压电源。 控制器耦合到第一引脚和第二引脚，以在低功率事件期间选择性地减少至少第二引脚的电流。