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23 条记录 (耗时 0.013 秒)

    SYSTEM AND METHOD OF LEAKAGE CONTROL IN AN ASYNCHRONOUS SYSTEM
    1.
    发明公开
    SYSTEM AND METHOD OF LEAKAGE CONTROL IN AN ASYNCHRONOUS SYSTEM 有权
    EINEM ASYNCHRONEN系统中的VERFAHREN ZUR LECKONTROLLE系统

    公开(公告)号：EP2232707A2

    公开(公告)日：2010-09-29

    申请号：EP08868798.3

    申请日：2008-12-24

    申请人： QUALCOMM Incorporated

    发明人： KONG, Xiaohua ,  CHUA-EOAN, Lew G. ,  YOON, Sei Seung ,  ZHU, Zhi

    IPC分类号： H03K19/00 ,  G06F1/32 ,  G06F9/38

    CPC分类号： H03K19/0016 ,  G06F9/3871

    摘要： Systems and methods of leakage control in an asynchronous pipeline are disclosed. In an embodiment, a signal is received from a preceding stage at an operative stage of an asynchronous circuit device, and a switch associated with the operative stage is activated in response to the control signal being sent to the operative stage to enable power to the operative stage.

    摘要翻译： 公开了异步管道中泄漏控制的系统和方法。 在一个实施例中，在异步电路设备的操作阶段从前一级接收信号，并且响应于控制信号被发送到操作级而使与操作级相关联的开关被激活，以使得操作 阶段。

    ON-CHIP LOW VOLTAGE CAPACITOR-LESS LOW DROPOUT REGULATOR WITH Q-CONTROL
    4.
    发明公开
    ON-CHIP LOW VOLTAGE CAPACITOR-LESS LOW DROPOUT REGULATOR WITH Q-CONTROL 有权
    冷凝器LOOSE片上低电压稳压器低电压损耗和Q-CONTROL

    公开(公告)号：EP2564284A2

    公开(公告)日：2013-03-06

    申请号：EP11719121.3

    申请日：2011-04-27

    申请人： Qualcomm Incorporated

    发明人： ZHANG, Junmou ,  CHUA-EOAN, Lew G.

    IPC分类号： G05F1/575

    CPC分类号： G05F1/575

    摘要： Systems and method for a capacitor-less Low Dropout (LDO) voltage regulator. An error amplifier is configured to amplify a differential between a reference voltage and a regulated LDO voltage. Without including an external capacitor in the LDO voltage regulator, a Miller amplifier is coupled to an output of the error amplifier, wherein the Miller amplifier is configured to amplify a Miller capacitance formed at an input node of the Miller amplifier. A capacitor coupled to the output of the error amplifier creates a positive feedback loop for decreasing a quality factor (Q), such that system stability is improved.

    THREE DIMENSIONAL INDUCTOR AND TRANSFORMER
    5.
    发明公开
    THREE DIMENSIONAL INDUCTOR AND TRANSFORMER 审中-公开
    维和变压器INDUKTOR

    公开(公告)号：EP2486586A1

    公开(公告)日：2012-08-15

    申请号：EP10771245.7

    申请日：2010-10-07

    申请人： Qualcomm Incorporated

    发明人： KIM, Jonghae ,  GU, Shiqun ,  HENDERSON, Brian Matthew ,  TOMS, Thomas R. ,  CHUA-EOAN, Lew G. ,  BAZARJANI, Seyfollah S. ,  NOWAK, Matthew

    IPC分类号： H01L21/02 ,  H01L23/522 ,  H01F17/00 ,  H01L27/06 ,  H01L23/48

    摘要： A three dimensional on-chip inductor, transformer and radio frequency amplifier are disclosed. The radio frequency amplifier includes a pair of transformers and a transistor. The transformers include at least two inductively coupled inductors. The inductors include a plurality of segments of a first metal layer, a plurality of segments of a second metal layer, a first inductor input, a second inductor input, and a plurality of through silicon vias coupling the plurality of segments of the first metal layer and the plurality of segments of the second metal layer to form a continuous, non-intersecting path between the first inductor input and the second inductor input. The inductors can have a symmetric or asymmetric geometry. The first metal layer can be a metal layer in the back-end-of-line section of the chip. The second metal layer can be located in the redistributed design layer of the chip.

    SYSTEM AND METHOD OF SILICON SWITCHED POWER DELIVERY USING A PACKAGE
    9.
    发明公开
    SYSTEM AND METHOD OF SILICON SWITCHED POWER DELIVERY USING A PACKAGE 审中-公开
    系统在维也纳FÜRSILIZIUMGESCHALTETE LEISTUNGSZUFUHR MITTELSGEHÄUSE

    公开(公告)号：EP2025060A2

    公开(公告)日：2009-02-18

    申请号：EP07797397.2

    申请日：2007-05-09

    申请人： Qualcomm Incorporated

    发明人： CHUA-EOAN, Lew G. ,  TOMS, Thomas R. ,  ANDREEV, Boris Dimitrov ,  GAGNE, Justin Joseph Rosen ,  SHI, Chunlei

    IPC分类号： H03K19/00

    CPC分类号： H03K17/223 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In one particular embodiment, an integrated circuit includes a package and a substrate electrically and physically coupled to the package. The package includes a first pin, a second pin, and metallization coupling the first pin to the second pin. The substrate is coupled to the package via the first pin and the second pin. The substrate includes a plurality of power domains and a power control unit. The second pin of the package is coupled to a particular power domain of the plurality of power domains. The power control unit includes logic and a switch, where the switch includes a first terminal coupled to a voltage supply terminal, a control terminal coupled to the logic, and a second terminal coupled to the first pin of the package. The logic selectively activates the switch to distribute power to the particular power domain via the metallization of the package.

    摘要翻译： 在一个特定实施例中，集成电路包括电气和物理耦合到封装的封装和衬底。 封装包括第一引脚，第二引脚和将第一引脚耦合到第二引脚的金属化。 衬底经由第一引脚和第二引脚耦合到封装。 基板包括多个电力域和功率控制单元。 封装的第二引脚耦合到多个电源域的特定电源域。 功率控制单元包括逻辑和开关，其中开关包括耦合到电压源端子的第一端子，耦合到逻辑电路的控制端子和耦合到封装的第一引脚的第二端子。 该逻辑选择性地激活开关以通过封装的金属化将功率分配给特定的功率域。