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15 条记录 (耗时 0.011 秒)

    CONCURRENT MULTI-SYSTEM SATELLITE NAVIGATION RECEIVER WITH REAL SIGNALING OUTPUT
    1.
    发明公开
    CONCURRENT MULTI-SYSTEM SATELLITE NAVIGATION RECEIVER WITH REAL SIGNALING OUTPUT 审中-公开
    与真正的问题信令同时进行多系统卫星导航接收器

    公开(公告)号：EP2972489A1

    公开(公告)日：2016-01-20

    申请号：EP14712856.5

    申请日：2014-03-03

    申请人： Qualcomm Incorporated

    发明人： WANG, Cheng-Han ,  KIM, Hong Sun ,  ZHAO, Liang ,  KO, Jin-Su

    IPC分类号： G01S19/33 ,  G01S19/37 ,  H04B1/00

    CPC分类号： G01S19/33 ,  G01S19/37 ,  H04B1/0067

    摘要： A GNSS receiver (300) includes at least one GNSS antenna (206) configured to receive input signaling from at least a first GNSS source and a second GNSS source; an I/Q mixer (202) coupled to the at least one GNSS antenna and configured to process the input signaling to obtain complex intermediate signaling; a first complex filter (310) coupled to the I/Q mixer and configured to filter the complex intermediate signaling with respect to a first frequency range to obtain first real output signaling; a second complex filter (312) coupled to the I/Q mixer and configured to filter the complex intermediate signaling with respect to a second frequency range to obtain second real output signaling; and a signal combiner (320) coupled to the first and second complex filters and configured to combine the first real output signaling and the second real output signaling.

    DRIVER AMPLIFIER HAVING A PROGRAMMABLE OUTPUT IMPEDANCE ADJUSTMENT CIRCUIT
    2.
    发明公开
    DRIVER AMPLIFIER HAVING A PROGRAMMABLE OUTPUT IMPEDANCE ADJUSTMENT CIRCUIT 审中-公开
    具有可编程的输出阻抗环驱动器放大器

    公开(公告)号：EP2316164A1

    公开(公告)日：2011-05-04

    申请号：EP09790998.0

    申请日：2009-07-30

    申请人： QUALCOMM Incorporated

    发明人： KEERTI, Arvind ,  KO, Jin-Su

    IPC分类号： H03F1/56

    CPC分类号： H03F1/56

    摘要： A driver amplifier in an integrated circuit is suitable for driving a signal onto an output node and through an output terminal, and through a matching network to a power amplifier. A novel Programmable Output Impedance Adjustment Circuit (POIAC) within the integrated circuit is coupled to the output node and affects an output impedance looking into the output terminal. When the output impedance would otherwise change (for example, due to a driver amplifier power gain change), the POIAC adjusts how it loads the output node such that the output impedance remains substantially constant. The POIAC uses a series-connected inductor and capacitor L-C-R circuit to load the output node, thereby reducing the amount of capacitance and die area required to perform multi-band impedance matching with a power amplifier. Multi-band operation is accomplished by changing an effective capacitance in the L-C-R circuit depending on communication band information received by the POIAC.

    RECONFIGURABLE LNA FOR INCREASED JAMMER REJECTION
    7.
    发明公开
    RECONFIGURABLE LNA FOR INCREASED JAMMER REJECTION 有权
    重配置LNA增加国防JAMMER

    公开(公告)号：EP2839578A1

    公开(公告)日：2015-02-25

    申请号：EP13785967.4

    申请日：2013-04-18

    申请人： Qualcomm Incorporated

    发明人： WANG, Cheng-Han ,  ZHAO, Liang ,  KIM, Hong Sun ,  KO, Jin-Su

    IPC分类号： H03F3/193 ,  H03F1/56 ,  H03F3/45 ,  H04B1/10

    摘要： A reconfigurable LNA for increased jammer rejection is disclosed. An exemplary embodiment includes an LNA having a tunable resonant frequency, and a detector configured to output a control signal to tune the resonant frequency of the LNA to increase jammer suppression. An exemplary method includes detecting if a jammer is present, tuning a resonant frequency of an LNA away from the jammer to increase jammer rejection if the jammer is present, and tuning the resonant frequency of the LNA to a selected operating frequency if the jammer is not present.

    SIMULTANEOUS SIGNAL RECEIVER WITH INTERSPERSED FREQUENCY ALLOCATION
    9.
    发明公开
    SIMULTANEOUS SIGNAL RECEIVER WITH INTERSPERSED FREQUENCY ALLOCATION 审中-公开
    插入的频率分配同时信号接收器

    公开(公告)号：EP2965435A1

    公开(公告)日：2016-01-13

    申请号：EP14711423.5

    申请日：2014-03-05

    申请人： Qualcomm Incorporated

    发明人： KO, Jin-Su ,  KIM, Hong Sun ,  ZHAO, Liang ,  WANG, Cheng-Han ,  FARMER, Dominic Gerard

    IPC分类号： H04B1/00

    CPC分类号： H04B1/16 ,  H04B1/005 ,  H04B1/0064 ,  H04B1/0075

    摘要： Methods and circuits can down convert at least a first RF signal on a first path in a first frequency band to provide a first IF signal. A second RF signal on second path in a second frequency band can be down converted to provide a second IF signal. The first IF signal and the second IF signal are interspersed in the frequency domain, and the first frequency band is different from the second frequency band. A combiner can combine at least part of the first IF signal and the second IF signal to provide a combined signal on an output signal path for reception by a digital processing circuit. The first IF signal or second IF signal can be a Zero IF (ZIF), very low IF (VLIF), or Low IF (LIF) signal.

    DIRECT CURRENT (DC) OFFSET CORRECTION USING ANALOG-TO-DIGITAL CONVERSION
    10.
    发明公开
    DIRECT CURRENT (DC) OFFSET CORRECTION USING ANALOG-TO-DIGITAL CONVERSION 审中-公开
    直流（DC）偏移校正使用模拟 - 数字转换

    公开(公告)号：EP2332302A1

    公开(公告)日：2011-06-15

    申请号：EP09790955.0

    申请日：2009-07-29

    申请人： QUALCOMM Incorporated

    发明人： AHRARI, Bahman ,  LEE, Hee Choul ,  KO, Jin-Su ,  LEE, Sang-Oh

    IPC分类号： H04L25/06 ,  H04L27/36

    CPC分类号： H04L25/061 ,  H04L27/364

    摘要： Techniques for reducing or eliminating DC (direct current) offset in transmitters are disclosed. An apparatus for DC offset reduction may include a converter, a digital engine, and a plurality of programmable current supplies. The converter is configured to provide digital representations of a plurality of DC currents associated, respectively, with a plurality of differential signal legs. The digital engine is configured to receive the digital representations and to produce instructions for generating compensating currents for the plurality of differential signal legs based on comparisons, respectively, between each of the digital representations and a calibration current. The programmable current supplies correspond, respectively, to the differential signal legs. The current supplies are configured to inject the compensating currents into the differential signal legs, respectively, to reduce DC offset between the differential signal legs, based upon the instructions. The instructions allow one-shot DC offset correction, instead of successive approximation for DC offset correction.