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    RF ISOLATION SWITCH CIRCUIT
    2.
    发明公开
    RF ISOLATION SWITCH CIRCUIT 有权
    HF-隔离，SCHALTKREIS

    公开(公告)号：EP2599221A1

    公开(公告)日：2013-06-05

    申请号：EP11767834.2

    申请日：2011-07-26

    申请人： Qualcomm Incorporated

    发明人： YAN, Hongyan ,  SANKARANARAYANAN, Janakiram Ganesh ,  ASURI, Bhushan Shanti ,  KHATRI, Himanshu ,  PANIKKATH, Vinod V.

    IPC分类号： H03K17/06 ,  H03K17/16 ,  H03K17/687 ,  H03H11/32 ,  H03H7/42 ,  H04B1/04 ,  H03H11/24 ,  H04B1/48 ,  H01P1/22

    CPC分类号： H03K17/063 ,  H03K17/161 ,  H03K17/687 ,  H03K2017/066 ,  H03K2217/0018 ,  H03K2217/0054

    摘要： In a first aspect, an RF switch includes a main transistor and a gate-to-source shorting circuit. When the RF switch is turned off, the gate-to-source shorting circuit is turned on to short the source and gate of the main transistor together, thereby preventing a Vgs from developing that would cause the main transistor to leak. When the RF switch is turned on, the gate-to-source shorting circuit is turned off to decouple the source from the gate. The gate is supplied with a digital logic high voltage to turn on the main transistor. In a second aspect, an RF switch includes a main transistor that has a bulk terminal. When the RF switch is turned off, the bulk is connected to ground through a high resistance. When the RF switch is turned on, the source and bulk are shorted together thereby reducing the threshold voltage of the main transistor.

    摘要翻译： 在第一方面中，RF开关包括主晶体管和栅极至源极短路电路。 当RF开关关闭时，栅极到源极短路电路导通，将主晶体管的源极和栅极连接在一起，从而防止Vgs发展，导致主晶体管泄漏。 当RF开关导通时，栅极 - 源极短路电路被关闭，以将源极与栅极去耦。 门提供数字逻辑高电压以接通主晶体管。 在第二方面，RF开关包括具有大容量端子的主晶体管。 当RF开关关闭时，体积通过高电阻连接到地。 当RF开关导通时，源极和体积短路在一起，从而降低主晶体管的阈值电压。

    MIXER ARCHITECTURES
    8.
    发明公开
    MIXER ARCHITECTURES 审中-公开
    MISCHERARCHITECTUREN

    公开(公告)号：EP3116121A1

    公开(公告)日：2017-01-11

    申请号：EP16184401.4

    申请日：2009-10-30

    申请人： QUALCOMM Incorporated

    发明人： KHATRI, Himanshu ,  LIU, Li

    IPC分类号： H03D7/14

    摘要： Techniques for designing a single-balanced mixer coupled to a dummy portion with a dummy load to improve noise rejection. In an aspect, a single-ended signal (RF) from a stage preceding the mixer, e.g., a low-noise amplifier (LNA), is coupled to the input of the single-balanced mixer to be mixed with a local oscillator (LO) signal. A dummy portion replicating the topology of the single-balanced mixer is coupled to the single-balanced mixer to improve noise rejection, with the LO signal also provided to the dummy portion. The input of the dummy portion may be coupled, e.g., to a dummy load, which is designed to replicate the loading characteristics of the preceding stage, e.g., the LNA.

    摘要翻译： 用于设计耦合到具有虚拟负载的虚拟部分以改善噪声抑制的单平衡混频器的技术。 在一个方面，来自混频器之前的级（例如低噪声放大器（LNA））的单端信号（RF）耦合到单平衡混频器的输入端，以与本地振荡器（LO ）信号。 将单平衡混频器的拓扑复制的虚拟部分耦合到单平衡混频器以改善噪声抑制，同时LO信号也提供给虚拟部分。 虚拟部分的输入可以例如耦合到虚拟负载，其被设计为复制前一级的负载特性，例如LNA。

    MIXER ARCHITECTURES
    9.
    发明公开
    MIXER ARCHITECTURES 有权
    混合器架构

    公开(公告)号：EP2351208A2

    公开(公告)日：2011-08-03

    申请号：EP09749276.3

    申请日：2009-10-30

    申请人： QUALCOMM Incorporated

    发明人： KHATRI, Himanshu ,  LIU, Li

    IPC分类号： H03D7/14

    CPC分类号： H03D7/1441 ,  H03D7/1433 ,  H03D7/1466 ,  H03D2200/0043

    摘要： Techniques for designing a single-balanced mixer coupled to a dummy portion with a dummy load to improve noise rejection. In an aspect, a single-ended signal (RF) from a stage preceding the mixer, e.g., a low-noise amplifier (LNA), is coupled to the input of the single-balanced mixer to be mixed with a local oscillator (LO) signal. A dummy portion replicating the topology of the single-balanced mixer is coupled to the single-balanced mixer to improve noise rejection, with the LO signal also provided to the dummy portion. The input of the dummy portion may be coupled, e.g., to a dummy load, which is designed to replicate the loading characteristics of the preceding stage, e.g., the LNA.

    摘要翻译： 用虚拟负载设计耦合到虚拟部分的单平衡混频器以改善噪声抑制的技术。 在一个方面，来自混频器之前的级（例如低噪声放大器（LNA））的单端信号（RF）耦合到单平衡混频器的输入端以与本地振荡器（LO ）信号。 复制单平衡混频器的拓扑结构的虚拟部分耦合到单平衡混频器以改善噪声抑制，LO信号也提供给虚拟部分。 虚设部分的输入可以例如耦合到虚设负载，虚设负载被设计为复制前级的负载特性，例如LNA。