SCHALTUNGSANORDNUNG ZUR REDUZIERUNG EINER EINGANGSSPANNUNG
    1.
    发明公开
    SCHALTUNGSANORDNUNG ZUR REDUZIERUNG EINER EINGANGSSPANNUNG 审中-公开
    电路减少输入电压

    公开(公告)号:EP1040400A1

    公开(公告)日:2000-10-04

    申请号:EP99923390.1

    申请日:1999-03-24

    CPC classification number: H03K5/08 G01P3/4802

    Abstract: The invention relates to a circuit for reducing a variable input voltage (Uein), especially a pulsed input voltage, to a working voltage (Uz, Uarb) that is fed to an evaluation circuit (10), wherein the input voltage (Uein) may be reduced to obtain the working voltage (Uz, Uarb) according to a division factor (F) supplied by at least one voltage divider (R1, R3, T1, R4; R7, R8, R2), wherein the at least one voltage divider (R1, R3, T1, R4; R7, R8, R2) can be regulated in such a way that the division factor (F) may be augmented with increasing input voltage (Uein) and lowered with reducing input voltage (Uein).

    DATENÜBERTRAGUNGSVERFAHREN MIT PULSBREITENMODULATION, SENDER UND EMPFÄNGER DAFÜR
    2.
    发明公开
    DATENÜBERTRAGUNGSVERFAHREN MIT PULSBREITENMODULATION, SENDER UND EMPFÄNGER DAFÜR 审中-公开
    脉宽调制,发送者和接收者THEREFOR数据传输过程

    公开(公告)号:EP1859560A1

    公开(公告)日:2007-11-28

    申请号:EP06724909.4

    申请日:2006-03-02

    CPC classification number: H04L25/4902

    Abstract: The invention relates to a method for transmitting serial data from a transmitter to a receiver consisting a) in fractionating a transmissible data value into several data words, b) in setting a pulse duration proportional to a non-negative whole number represented by a respective data word, including a constant positive supplement and producing a corresponding impulse, c) in transmitting an impulse (IH, IM, IL) having a respective set impulse duration from the transmitter to the receiver, and d) in detecting respective impulse duration on the receiver and in restoring a respective data word therefrom and, subsequently, the data value.

    STEUERGERÄT MIT RECHENGERÄT UND PERIPHERIEBAUSTEIN, DIE ÜBER EINEN SERIELLEN MEHRDRAHTBUS MITEINANDER IN VERBINDUNG STEHEN
    3.
    发明公开
    STEUERGERÄT MIT RECHENGERÄT UND PERIPHERIEBAUSTEIN, DIE ÜBER EINEN SERIELLEN MEHRDRAHTBUS MITEINANDER IN VERBINDUNG STEHEN 有权
    与计算设备和外设BLOCK通过串行多线一起连接控制设备

    公开(公告)号:EP1928703A1

    公开(公告)日:2008-06-11

    申请号:EP06806739.6

    申请日:2006-09-01

    CPC classification number: G06F13/4072

    Abstract: The invention relates to a control device (20), which comprises at least one computing device (2) and at least one separate peripheral module (21) which is connected to the computing device (2) via a serial multiwire bus (4), with at least one output stage (9) for forwarding serial data to means outside of the control device (20). In order to keep the number of pins (10) required on the peripheral module (3) to a minimum, thereby reducing the cost of the entire control device (20), it is proposed that the peripheral module (21) has an asynchronous single-wire interface (22) between an interface (8) for the serial multiwire bus (4) and the output stage (9). The asynchronous single-wire interface (22) is preferably a UART (Universal Asynchronous Receiver Transmitter) interface. The serial multiwire bus (4) is preferably a microsecond bus.

    VERFAHREN ZUR KOMMUNIKATION ZWISCHEN MINDESTENS ZWEI TEILNEHMERN EINES KOMMUNIKATIONSSYSTEMS
    5.
    发明公开
    VERFAHREN ZUR KOMMUNIKATION ZWISCHEN MINDESTENS ZWEI TEILNEHMERN EINES KOMMUNIKATIONSSYSTEMS 审中-公开
    方法之间的至少两个通信系统的参与者沟通

    公开(公告)号:EP1891535A2

    公开(公告)日:2008-02-27

    申请号:EP06763233.1

    申请日:2006-05-23

    CPC classification number: G06F11/1004 G06F13/4213

    Abstract: The invention relates to a method for communication between at least two subscribers (2, 3) of a communication system via a plurality of data lines (D0 - D31) of a data bus, some of these data lines being used as address lines (A0 - A23) of an address bus and data and addresses being transmitted in multiplex transmission. In order to facilitate a simple and inexpensive protection of the transmission path between the subscribers (2, 3), redundant data are transmitted via at least one of the data lines (D24 - D31) that is not used as the address line (A0 - A23) at the same time the address is transmitted via the address line (A0 - A23). Checksums (so-called check bits) are preferably transmitted as the redundant data. The inventive method is preferably used for communication between a microprocessor (3) and an external memory module (2).

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