公开(公告)号：EP1505643B1

公开(公告)日：2012-11-14

申请号：EP04018715.5

申请日：2004-08-06

申请人： SANYO ELECTRIC CO., LTD.

发明人： Noma, Takashi ,  Kitagawa, Katsuhiko ,  Otsuka, Hisao ,  Suzuki, Akira ,  Seki, Yoshinori ,  Takao,Yukihiro ,  Yamaguchi, Keiichi ,  Wakui, Motoaki ,  Iida, Masanori

IPC分类号： H01L23/31 ,  H01L21/68

CPC分类号： H01L24/13 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/12 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/02313 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/13099

公开(公告)号：EP1505643A3

公开(公告)日：2009-05-06

申请号：EP04018715.5

申请日：2004-08-06

申请人： SANYO ELECTRIC CO., LTD.

发明人： Noma, Takashi ,  Kitagawa, Katsuhiko ,  Otsuka, Hisao ,  Suzuki, Akira ,  Seki, Yoshinori ,  Takao,Yukihiro ,  Yamaguchi, Keiichi ,  Wakui, Motoaki ,  Iida, Masanori

IPC分类号： H01L23/31 ,  H01L21/68

CPC分类号： H01L24/13 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/12 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/02313 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A manufacturing method of a semiconductor device formed in a chip size package is improved to enhance a yield and reliability. A window (20) to expose first wirings (3) is formed only in a region of a semiconductor substrate (1) where the first wirings (3) exist. As a result, area of the semiconductor substrate (1) bonded to a supporting body (4) through an insulation film (2) and a resin (5) is increased to prevent cracks in the supporting body (4) and separation of the semiconductor substrate (1) from the supporting body (4). A slit (30) is formed along a dicing line after forming the window (20), the slit (30) is covered with a protection film (10) and then the semiconductor substrate (1) is diced into individual semiconductor dice. Thus, separation on a cut surface or at an edge of the semiconductor dice, which otherwise would be caused by contact of the blade in the dicing can be prevented.

摘要翻译： 以芯片尺寸封装形成的半导体器件的制造方法被改进以提高产量和可靠性。 仅在半导体衬底（1）的存在第一布线（3）的区域中形成暴露第一布线（3）的窗口（20）。 结果，通过绝缘膜（2）和树脂（5）结合到支撑体（4）的半导体衬底（1）的面积增加，以防止支撑体（4）中的裂缝和半导体 衬底（1）与支撑体（4）分离。 在形成窗口（20）之后沿切割线形成狭缝（30），用保护膜（10）覆盖狭缝（30），然后将半导体衬底（1）切割成单独的半导体管芯。 因此，可防止切割表面或半导体管芯的边缘处的分离，否则将由切割中的刀片的接触引起。

公开(公告)号：EP1641039B1

公开(公告)日：2009-01-21

申请号：EP05020906.3

申请日：2005-09-26

申请人： SANYO ELECTRIC CO., LTD.

发明人： Noma, Takashi ,  Okada Kazuo ,  Yamada Hiroshi ,  Iida, Masanori

IPC分类号： H01L23/31 ,  H01L23/485 ,  H01L21/60

CPC分类号： H01L24/12 ,  H01L21/76898 ,  H01L23/3114 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/00014

公开(公告)号：EP1641039A1

公开(公告)日：2006-03-29

申请号：EP05020906.3

申请日：2005-09-26

申请人： SANYO ELECTRIC CO., LTD.

发明人： Noma, Takashi ,  Okada Kazuo ,  Yamada Hiroshi ,  Iida, Masanori

IPC分类号： H01L23/31 ,  H01L23/485 ,  H01L21/60

CPC分类号： H01L24/12 ,  H01L21/76898 ,  H01L23/3114 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/00014

摘要： The invention is directed to an improvement of reliability of a chip size package type semiconductor device in a manufacturing method thereof. A support body (14) is formed on a front surface of a semiconductor substrate (10) with a first insulation film (11) therebetween. Then, a part of the semiconductor substrate (10) is selectively etched from its back surface to form an opening (10w), and then a second insulation film (16) is formed on the back surface. Next, the first insulation film (11) and the second insulation film (16) at a bottom of the opening (10w) are selectively etched, to expose pad electrodes (12) at the bottom of the opening (10w). Then, a third resist layer (18) is selectively formed on the second insulation film (16) at boundaries between sidewalls and the bottom of the opening (10w) on the back surface of the semiconductor substrate (10). Furthermore, a wiring layer (19) electrically connected with the pad electrodes (12) at the bottom of the opening (10w) and extending onto the back surface of the semiconductor substrate (10) is selectively formed corresponding to a predetermined pattern.

摘要翻译： 本发明的目的在于提高芯片尺寸封装型半导体器件的制造方法的可靠性。 在半导体基板（10）的前表面上形成有第一绝缘膜（11）的支撑体（14）。 然后，从其背面选择性地蚀刻半导体衬底（10）的一部分以形成开口（10w），然后在背面形成第二绝缘膜（16）。 接下来，选择性地蚀刻开口（10w）底部的第一绝缘膜（11）和第二绝缘膜（16），以露出开口（10w）底部的焊盘电极（12）。 然后，在半导体衬底（10）的背面的开口（10w）的侧壁和底部之间的边界处，在第二绝缘膜（16）上选择性地形成第三抗蚀剂层（18）。 此外，对应于预定图案，选择性地形成与开口（10w）底部的焊盘电极（12）电连接并延伸到半导体衬底（10）的背面上的布线层（19）。

公开(公告)号：EP1505643A2

公开(公告)日：2005-02-09

申请号：EP04018715.5

申请日：2004-08-06

申请人： Sanyo Electric Co., Ltd.

发明人： Noma, Takashi ,  Kitagawa, Katsuhiko ,  Otsuka, Hisao ,  Suzuki, Akira ,  Seki, Yoshinori ,  Takao,Yukihiro ,  Yamaguchi, Keiichi ,  Wakui, Motoaki ,  Iida, Masanori

IPC分类号： H01L23/31 ,  H01L21/68

CPC分类号： H01L24/13 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/12 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/02313 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A manufacturing method of a semiconductor device formed in a chip size package is improved to enhance a yield and reliability. A window (20) to expose first wirings (3) is formed only in a region of a semiconductor substrate (1) where the first wirings (3) exist. As a result, area of the semiconductor substrate (1) bonded to a supporting body (4) through an insulation film (2) and a resin (5) is increased to prevent cracks in the supporting body (4) and separation of the semiconductor substrate (1) from the supporting body (4). A slit (30) is formed along a dicing line after forming the window (20), the slit (30) is covered with a protection film (10) and then the semiconductor substrate (1) is diced into individual semiconductor dice. Thus, separation on a cut surface or at an edge of the semiconductor dice, which otherwise would be caused by contact of the blade in the dicing can be prevented.

摘要翻译： 改善了以芯片尺寸封装形成的半导体器件的制造方法，以提高产量和可靠性。 仅在存在第一配线（3）的半导体衬底（1）的区域中形成用于露出第一配线（3）的窗口（20）。 结果，增加了通过绝缘膜（2）和树脂（5）接合到支撑体（4）的半导体衬底（1）的面积，以防止支撑体（4）中的裂纹和半导体的分离 基板（1）从支撑体（4）。 在形成窗（20）之后，沿着切割线形成狭缝（30），用保护膜（10）覆盖狭缝（30），然后将半导体基板（1）切割成单独的半导体管芯。 因此，可以防止在切割时由刀片接触而导致的半导体管芯的切割面或边缘处的分离。