Differential output, power, CMOS, operational amplifier
    1.
    发明公开
    Differential output, power, CMOS, operational amplifier 失效
    CMOS-Differenzausgangsleistungsoperationsverstärker。

    公开(公告)号:EP0493335A1

    公开(公告)日:1992-07-01

    申请号:EP91830557.4

    申请日:1991-12-16

    IPC分类号: H03F3/45

    摘要: A power CMOS operational amplifier with a differential output (Vout-,Vout+), having an intrinsically stable current absorption under rest conditions, comprises two symmetric branches, each comprising a first folded cascode input inverting stage (M1-M10), a level shifting circuit (M11,M12), a second current mirror type noninverting amplifying stage (M13-M18) and a third output inverting stage (M19,M20), constituted by a complementary pair of transistors, connected in a common source configuration between the supply rails and driven by the output (A",B") of the second noninverting stage and by the output (A',B') of the level shifting circuit. Frequency compensation is accomplished by means of two capacitors (Cc1,Cc2) connected between each of the two output terminals (Vout-,Vout+) of the amplifier and the output (A,B) of the first inverting stage (M1-M10) and a node of the output branch of the noninverting current mirror stage (M13-M18). A single common mode feedback network (McM1-McM3) stabilizes both symmetric branches of the amplifier.

    摘要翻译: 具有差分输出(Vout-,Vout +)的功率CMOS运算放大器在静止条件下具有本质上稳定的电流吸收,包括两个对称分支,每个分支包括第一折叠共源共栅输入反相级(M1-M10),电平移位电路 (M11,M12),第二电流镜式同相放大级(M13-M18)和第三输出反相级(M19,M20),由互补的一对晶体管构成,以公共源配置连接在供电轨和 由第二同相级的输出(A“,B”和电平移位电路的输出(A',B')驱动。 频率补偿通过连接在放大器的两个输出端子(Vout-,Vout +)和第一反相级(M1-M10)的输出(A,B)之间的两个电容器(Cc1,Cc2)和 同相电流镜级(M13-M18)的输出分支的节点。 单个共模反馈网络(McM1-McM3)稳定了放大器的两个对称分支。

    Antibounce circuit for digital circuits
    3.
    发明公开
    Antibounce circuit for digital circuits 失效
    数字电路防雷电路

    公开(公告)号:EP0320711A3

    公开(公告)日:1989-09-27

    申请号:EP88120115.6

    申请日:1988-12-02

    IPC分类号: H03K5/01

    CPC分类号: H03K5/1252

    摘要: The antibounce circuit comprises:
    a) a first flip-flop constituted by a first and a second NAND gate (10, 12) having their respective outputs connected to one of the inputs of the other gate, the free input of the first gate being the input for said digital signal; b) a second flip-flop constituted by a third and a fourth NAND gate (14, 16) having their respective outputs connected to one of the inputs of the other gate, the free input of the third gate being connected to the output of the first gate; c)a non-inverting delay circuit (20, 22, 24) connecting the output of the third gate to the free input of the second gate; d) a first inverter connecting the output of the delay circuit to the free input of the fourth gate.

    CMOS power operational amplifier
    4.
    发明公开
    CMOS power operational amplifier 失效
    CMOS-Leistungsoperationsverstärker。

    公开(公告)号:EP0295221A2

    公开(公告)日:1988-12-14

    申请号:EP88830249.4

    申请日:1988-06-01

    IPC分类号: H03F1/08 H03F3/30

    CPC分类号: H03F1/083 H03F3/3001

    摘要: A CMOS power operational amplifier with large output voltage swing and high noise rejection is obtained by coupling a folded cascode type differential input stage and an output stage comprising an intermediate signal shifting amplifier and two common source output stages. Constant current generators inject into the drain of grounded gate MOS transistors pairs of said folded cascode type stage and of said intermediately signal shifting amplifier, respectively, a current which is pulled out of the source of the same grounded gate transistors by other constant current generators for increasing the effective transconductance of said grounded gate transistors pairs.

    摘要翻译: 通过耦合折叠共源共栅型差分输入级和包括中间信号移位放大器和两个公共源输出级的输出级,可获得具有大输出电压摆幅和高噪声抑制的CMOS功率运算放大器。 恒定电流发生器分别将所述折叠共源共栅型级和所述中间信号移位放大器的接地栅极MOS晶体管对的漏极注入到由其他恒定电流发生器从相同的接地栅极晶体管的源极拉出的电流, 增加所述接地栅极晶体管对的有效跨导。

    CMOS power operational amplifier
    5.
    发明公开
    CMOS power operational amplifier 失效
    CMOS电源运算放大器CMOS功率放大器

    公开(公告)号:EP0295221A3

    公开(公告)日:1989-06-07

    申请号:EP88830249.4

    申请日:1988-06-01

    IPC分类号: H03F1/08 H03F3/30

    CPC分类号: H03F1/083 H03F3/3001

    摘要: A CMOS power operational amplifier with large output voltage swing and high noise rejection is obtained by coupling a folded cascode type differential input stage and an output stage comprising an intermediate signal shifting amplifier and two common source output stages. Constant current generators inject into the drain of grounded gate MOS transistors pairs of said folded cascode type stage and of said intermediately signal shifting amplifier, respectively, a current which is pulled out of the source of the same grounded gate transistors by other constant current generators for increasing the effective transconductance of said grounded gate transistors pairs.

    Low-noise amplifier with high input impedance, particularly for microphones
    8.
    发明公开
    Low-noise amplifier with high input impedance, particularly for microphones 失效
    具有高输入阻抗的低噪声放大器,特别适用于麦克风

    公开(公告)号:EP0448951A3

    公开(公告)日:1992-03-04

    申请号:EP91102237.4

    申请日:1991-02-18

    发明人: Pernici, Sergio

    IPC分类号: H03F3/45 H03F3/26

    CPC分类号: H03F3/265 H03F2200/372

    摘要: The amplifier includes a pair of bipolar input transistors (Q1, Q2), each having a base adapted to receive a differential input signal, a collector and an emitter which is biased by a first fixed current source (M7, M8) of its own and a degeneration resistor (R) which connects the emitters of the two bipolar transistors. The collector of each bipolar transistor is also biased by a second fixed current source (M5, M6) with a smaller current than that of the first source, and the collectors of the two bipolar transistors are furthermore connected to the input terminals of respective MOS amplifier devices (M1, M2, M3, M4, R L ). The amplifier can be made in BCD, BiCMOS or purely CMOS technology, in which case the bipolar transistors are obtained as lateral bipolar transistors.

    Low-noise amplifier with high input impedance, particularly for microphones
    9.
    发明公开
    Low-noise amplifier with high input impedance, particularly for microphones 失效
    RauscharmeVerstärkermit hoher Eingangsimpedanz,insbesonderefürMikrophone。

    公开(公告)号:EP0448951A2

    公开(公告)日:1991-10-02

    申请号:EP91102237.4

    申请日:1991-02-18

    发明人: Pernici, Sergio

    IPC分类号: H03F3/45 H03F3/26

    CPC分类号: H03F3/265 H03F2200/372

    摘要: The amplifier includes a pair of bipolar input transistors (Q1, Q2), each having a base adapted to receive a differential input signal, a collector and an emitter which is biased by a first fixed current source (M7, M8) of its own and a degeneration resistor (R) which connects the emitters of the two bipolar transistors. The collector of each bipolar transistor is also biased by a second fixed current source (M5, M6) with a smaller current than that of the first source, and the collectors of the two bipolar transistors are furthermore connected to the input terminals of respective MOS amplifier devices (M1, M2, M3, M4, R L ). The amplifier can be made in BCD, BiCMOS or purely CMOS technology, in which case the bipolar transistors are obtained as lateral bipolar transistors.

    摘要翻译: 放大器包括一对双极性输入晶体管(Q1,Q2),每一个具有适于接收差分输入信号的基极,由本身的第一固定电流源(M7,M8)偏置的集电极和发射极,以及 连接两个双极晶体管的发射极的退化电阻(R)。 每个双极晶体管的集电极也被具有比第一源极小的电流的第二固定电流源(M5,M6)偏置,并且两个双极晶体管的集电极还连接到各个MOS放大器的输入端 设备(M1,M2,M3,M4,RL)。 放大器可以采用BCD,BiCMOS或纯CMOS技术制造,在这种情况下,双极型晶体管可作为横向双极晶体管获得。