Multiple-output transconductance amplifier based instrumentation amplifier
    1.
    发明公开
    Multiple-output transconductance amplifier based instrumentation amplifier 审中-公开
    Instrumentenverstärkerauf der Grundlage eines Transkonduktanz-Verstärkersmit Mehrfachausgabe

    公开(公告)号:EP2688203A2

    公开(公告)日:2014-01-22

    申请号:EP13174997.0

    申请日:2013-07-03

    发明人: Werking, Paul M.

    IPC分类号: H03F3/45

    摘要: This disclosure is directed to devices and integrated circuits for instrumentation amplifiers. In one example, an instrumentation amplifier device uses two non-inverted outputs of a first multiple-output transconductance amplifier, and a non-inverted output and an inverted output of a second multiple-output transconductance amplifier. Both multiple-output transconductance amplifiers have a non-inverted output connected to an inverting input, and a noninverting input connected to a respective input voltage terminal. A first resistor is connected between the inverting inputs of both multiple-output transconductance amplifiers. The outputs of both multiple-output transconductance amplifiers are connected together, connected through a second resistor to ground, and connected to an output voltage terminal. In other examples, two pairs of outputs from triple-output transconductance amplifiers are connected to provide two voltage output terminals, and may also be connected to buffers or a differential amplifier. These provide various advantages over traditional instrumentation amplifiers.

    摘要翻译: 本公开涉及用于仪表放大器的装置和集成电路。 在一个示例中,仪表放大器装置使用第一多输出跨导放大器的两个非反相输出,以及第二多输出跨导放大器的非反相输出和反相输出。 两输出跨导放大器都具有连接到反相输入端的非反相输出端和连接到相应输入电压端子的同相输入端。 第一电阻连接在两输出跨导放大器的反相输入端之间。 多输出跨导放大器的输出端连接在一起,通过第二个电阻连接到地,并连接到输出电压端子。 在其他示例中,来自三输出跨导放大器的两对输出被连接以提供两个电压输出端子,并且还可以连接到缓冲器或差分放大器。 与传统的仪表放大器相比,它们具有多种优点。

    AN AMPLIFIER STAGE HAVING A SWITCHABLE GAIN AND REDUCED DISTORTION
    3.
    发明公开
    AN AMPLIFIER STAGE HAVING A SWITCHABLE GAIN AND REDUCED DISTORTION 失效
    具有可切换增益,降低失真升压级

    公开(公告)号:EP0764364A2

    公开(公告)日:1997-03-26

    申请号:EP96904236.0

    申请日:1996-03-18

    IPC分类号: H03G3 H03F1 H03F3

    摘要: An amplifier stage comprising a differential pair (T1, T2) is provided with a resistive ladder (R1...R2n) coupled between the second control electrodes of said differential pair. Taps on mirror positions along the resistive ladder (R1...R2n) are switchably connected to first and second current source transistors (T3, T4), said current source transistors having their control electrodes connected to the first main electrodes of the transistors forming the differential pair. By placing the switches in series with the current source transistors (T3, T4), the influence of the non-linear impedance of the switches is reduced to negligibly small proportions as the output impedance of the current source transistors (T3, T4) is considerably higher than the impedance of the switches. Thus a linear conversion impedance is obtained, resulting in an amplifier stage having a switchable gain and reduced distortion.

    COMMON MODE SIGNAL DETECTOR
    4.
    发明授权
    COMMON MODE SIGNAL DETECTOR 失效
    通用模式信号检测器

    公开(公告)号:EP0157799B1

    公开(公告)日:1988-03-02

    申请号:EP84903393.1

    申请日:1984-09-04

    申请人: AT&T Corp.

    发明人: BANU, Mihai

    IPC分类号: H03F3/45 G06G7/14

    摘要: A common mode detector (10) for producing an output voltage (VA + VB)/2 in response to input voltages VA and VB contains a pair of MOS transitors (MA and MB) connected in series between a pair of input terminals A and B to which the input voltages (VA and VB) are to be applied. A separate feedback path runs from each input terminal (A, B) through a separate load device (LA2, LB2) to a gate control terminal of the respective MOS transistor (MA, MB) and a separate other feedback path runs from each input terminal (A, B) through a separate other load device (LA3, LB3) to a substrate terminal (SA, SB) of the respective MOS transistors. In this way, the respective feedback paths deliver to the respective gate terminals respective voltages equal to (VDD + VA)/2 and (VDD + VB)/2, respectively, while the other feedback paths deliver to the substrates of the respective MOS transistors (MA, MB) respective substrate bias voltages equal to (VSS + VA)/2 and (VSS + VB)/2, whereby the common mode voltage (VA + VB)/2 is developed at a node (AB) between the pair of MOS transistors (MA, MB).

    A two-stage fully differential operational amplifier with efficient common-mode feed back circuit
    8.
    发明公开
    A two-stage fully differential operational amplifier with efficient common-mode feed back circuit 失效
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    公开(公告)号:EP0840442A1

    公开(公告)日:1998-05-06

    申请号:EP96830555.7

    申请日:1996-10-30

    IPC分类号: H03F1/00 H03F3/45

    摘要: The circuit of a two-stage fully differential amplifier composed of a differential input stage, two output stages and a common mode feedback circuit coupled to the output nodes of the amplifier includes a non-inverting stage coupled to a respective output node of the differential input stage for driving the respective output stage. Each auxiliary non-inverting stage of the two branches of the fully differential amplifier uses as a biasing current generator, the load device of the branch of the differential input stage to the output of which the non-inverting stage is coupled. The modified circuit of the fully differential amplifier permits the use of a null-consumption common mode feedback circuit as normally employed in a single stage fully differential amplifier.

    摘要翻译: 由差分输入级,两个输出级和耦合到放大器的输出节点的共模反馈电路组成的两级全差分放大器的电路包括一个非反相级,其耦合到差分输入的相应输出节点 用于驱动各个输出级的阶段。 全差分放大器的两个分支的每个辅助非反相级用作偏置电流发生器,差分输入级的分支的负载装置与非反相级耦合的输出端。 全差分放大器的修改电路允许使用通常在单级全差分放大器中使用的零消耗共模反馈电路。

    Amplificateur différentiel à réglage de mode commun
    10.
    发明公开
    Amplificateur différentiel à réglage de mode commun 失效
    Differentialzverstärkermit Gleichtaktregelung。

    公开(公告)号:EP0680140A1

    公开(公告)日:1995-11-02

    申请号:EP95410038.4

    申请日:1995-04-26

    发明人: Weiss, Juliette

    IPC分类号: H03F3/45 H03F3/30 H03F3/26

    摘要: La présente invention concerne un amplificateur à entrées et sorties différentielles comprenant une paire différentielle d'entrée (10) ; un premier (11) et un deuxième (12) préamplificateur de tension à entrée différentielle et à sortie unique reoevant chacun les sorties de la paire différentielle ; un étage adaptateur d'impédance (13, 14) connecté à chaque préamplificateur et dont la sortie constitue une sortie de l'amplificateur ; et un moyen unique (R10) d'ajustement du courant de repos envoyé par les préamplificateurs aux étages adaptateurs, d'où il résulte que la tension de mode commun peut être ajustée à une valeur souhaitée.

    摘要翻译: 差分放大器包括:第一放大器(10),其接收差分输入电压并将电压传递到两个前置放大器(11,12)。 每个前置放大器给放大器级(13,14)提供单个输出。 放大器级是阻抗适配器,是具有低增益的发射极跟随器。 前置放大器连接到单个可调电阻(R10)。 电阻器将前置放大器发送的剩余电流适配到阻抗匹配级,允许共模电压调节。