摘要:
This disclosure is directed to devices and integrated circuits for instrumentation amplifiers. In one example, an instrumentation amplifier device uses two non-inverted outputs of a first multiple-output transconductance amplifier, and a non-inverted output and an inverted output of a second multiple-output transconductance amplifier. Both multiple-output transconductance amplifiers have a non-inverted output connected to an inverting input, and a noninverting input connected to a respective input voltage terminal. A first resistor is connected between the inverting inputs of both multiple-output transconductance amplifiers. The outputs of both multiple-output transconductance amplifiers are connected together, connected through a second resistor to ground, and connected to an output voltage terminal. In other examples, two pairs of outputs from triple-output transconductance amplifiers are connected to provide two voltage output terminals, and may also be connected to buffers or a differential amplifier. These provide various advantages over traditional instrumentation amplifiers.
摘要:
An amplifier stage comprising a differential pair (T1, T2) is provided with a resistive ladder (R1...R2n) coupled between the second control electrodes of said differential pair. Taps on mirror positions along the resistive ladder (R1...R2n) are switchably connected to first and second current source transistors (T3, T4), said current source transistors having their control electrodes connected to the first main electrodes of the transistors forming the differential pair. By placing the switches in series with the current source transistors (T3, T4), the influence of the non-linear impedance of the switches is reduced to negligibly small proportions as the output impedance of the current source transistors (T3, T4) is considerably higher than the impedance of the switches. Thus a linear conversion impedance is obtained, resulting in an amplifier stage having a switchable gain and reduced distortion.
摘要:
A common mode detector (10) for producing an output voltage (VA + VB)/2 in response to input voltages VA and VB contains a pair of MOS transitors (MA and MB) connected in series between a pair of input terminals A and B to which the input voltages (VA and VB) are to be applied. A separate feedback path runs from each input terminal (A, B) through a separate load device (LA2, LB2) to a gate control terminal of the respective MOS transistor (MA, MB) and a separate other feedback path runs from each input terminal (A, B) through a separate other load device (LA3, LB3) to a substrate terminal (SA, SB) of the respective MOS transistors. In this way, the respective feedback paths deliver to the respective gate terminals respective voltages equal to (VDD + VA)/2 and (VDD + VB)/2, respectively, while the other feedback paths deliver to the substrates of the respective MOS transistors (MA, MB) respective substrate bias voltages equal to (VSS + VA)/2 and (VSS + VB)/2, whereby the common mode voltage (VA + VB)/2 is developed at a node (AB) between the pair of MOS transistors (MA, MB).
摘要:
A switched capacitor circuit is described that uses two switchable operational amplifiers (A1, A1') that operate in parallel and in alternate clock phases (phi1 and phi2). In a preferred embodiment of the invention, the two operational amplifiers may be implemented by a single two stage operational amplifier having a common input stage and two switchable output pairs (Vout 1 and Vout 2). The novel switched capacitor circuit may be used in any application that uses a conventional switched capacitor circuit, such as an integrator and a filter means.
摘要:
Amplificateur différentiel large-bande comportant un premier étage différentiel suivi d'un étage de Miller permettant d'accroître le gain en boucle ouverte. L'étage de Miller comporte une source de courant dans laquelle un réseau résistif-capacitif provoquer une réinjection d'une partie du signal de sortie de l'étage de MILLER, à haute fréquence, de manière à déplacer, dans ces fréquences, le point de polarisation de la source de courant et ainsi, accroître sensiblement le gain de l'étage de Miller vers cette valeur extrème de la fréquence.
摘要:
The circuit of a two-stage fully differential amplifier composed of a differential input stage, two output stages and a common mode feedback circuit coupled to the output nodes of the amplifier includes a non-inverting stage coupled to a respective output node of the differential input stage for driving the respective output stage. Each auxiliary non-inverting stage of the two branches of the fully differential amplifier uses as a biasing current generator, the load device of the branch of the differential input stage to the output of which the non-inverting stage is coupled. The modified circuit of the fully differential amplifier permits the use of a null-consumption common mode feedback circuit as normally employed in a single stage fully differential amplifier.
摘要:
La présente invention concerne un amplificateur à entrées et sorties différentielles comprenant une paire différentielle d'entrée (10) ; un premier (11) et un deuxième (12) préamplificateur de tension à entrée différentielle et à sortie unique reoevant chacun les sorties de la paire différentielle ; un étage adaptateur d'impédance (13, 14) connecté à chaque préamplificateur et dont la sortie constitue une sortie de l'amplificateur ; et un moyen unique (R10) d'ajustement du courant de repos envoyé par les préamplificateurs aux étages adaptateurs, d'où il résulte que la tension de mode commun peut être ajustée à une valeur souhaitée.