摘要:
A method of using diluted nitric acid and an edge bead removal tool to remove copper from the perimeter of a semiconductor wafer is provided. In one method, sensitive areas of the wafer are covered with photoresist, and the wafer perimeter cleared of photoresist, before the acid is applied In another method, sensitive areas of the wafer are protected with water spray as the copper etchant is applied. In a third method, the nitric acid is applied to clear the wafer perimeter of copper before a chemical mechanical polishing (CMP) is performed on the layer of deposited copper. The excess thickness of copper protects copper interconnection structures from reacting with the copper etchant. All these methods permit copper to be removed at a low enough temperature that copper oxides are not formed. A semiconductor wafer cleaned of copper in accordance with the above-described method, and a system for low temperature copper removal is also provided.
摘要:
A method of using diluted nitric acid and an edge bead removal tool to remove copper from the perimeter of a semiconductor wafer is provided. In one method, sensitive areas of the wafer are covered with photoresist, and the wafer perimeter cleared of photoresist, before the acid is applied In another method, sensitive areas of the wafer are protected with water spray as the copper etchant is applied. In a third method, the nitric acid is applied to clear the wafer perimeter of copper before a chemical mechanical polishing (CMP) is performed on the layer of deposited copper. The excess thickness of copper protects copper interconnection structures from reacting with the copper etchant. All these methods permit copper to be removed at a low enough temperature that copper oxides are not formed. A semiconductor wafer cleaned of copper in accordance with the above-described method, and a system for low temperature copper removal is also provided.
摘要:
An apparatus for removing copper from semiconductor wafer disk having top and bottom surfaces, with top surface edges and sides along the top surface edge around the perimeter of the wafer surfaces comprises: an enclosed chamber; a spin-chuck to rotate the mounted wafer; a first solution application nozzle having at least one position approximately above the wafer edge to spray diluted copper etchant solution at room temperature towards the sides and perimeter edge of the wafer, to remove copper from the sides and perimeter edge of the wafer; a second nozzle having at least one position approximately above the wafer perimeter to spray a protective coating etchant upon the edge of the wafer top surface along the perimeter, whereby protective coating, masking copper interconnection structures on the wafer top surface, is removed on the edge of the top surface and the wafer side before copper etchant is applied; and a third solution application nozzle having at least one position approximately above the center of the wafer to spray de-ionized water on the wafer, whereby the water is used to remove etchants and etchant compounds from the wafer.
摘要:
A method of fabricating a memory device includes preparing a silicon substrate; depositing a layer of high-k insulator on the silicon substrate; depositing a buffering layer on the high-k insulating layer; depositing a layer of ferroelectric material on the buffering layer by metal organic chemical vapor deposition; forming a top electrode on the layer of ferroelectric material; and completing the device obtained by above steps.
摘要:
The present invention provides a method for producing a semiconductor device using a self-aligned shallow trench isolation process isolating elements formed so as to be self-aligned to a gate structure, the method comprising the steps of: providing a first polysilicon layer overlying a gate insulator layer on a substrate; forming a trench through the first polysilicon layer, and into the substrate; providing an oxide layer overlying the substrate including the trench such that a top surface of the oxide layer within the trench is higher than a bottom surface of the first polysilicon layer; providing a second polysilicon layer overlying the oxide layer such that a top surface of the second polysilicon layer within the trench is lower than the top surface of the first polysilicon layer; and planarizing the second polysilicon layer, the oxide layer, and the first polysilicon layer, while stopping the step of planarizing at the top surface of the second polysilicon layer within the trench.
摘要:
A method of forming a reticle includes providing a reticle blank having a quartz layer, an attenuated phase shift layer, and a metal layer, covering the reticle blank with resist ; patterning the resist into multiple levels; and etching the reticle blank according to the multi-level resist : pattern.
摘要:
A method of forming a reticle includes providing a reticle blank having a quartz layer, an attenuated phase shift layer, and a metal layer, covering the reticle blank with resist ; patterning the resist into multiple levels; and etching the reticle blank according to the multi-level resist : pattern.
摘要:
A MFMOS one transistor memory structure for ferroelectric non-volatile memory devices includes a high dielectric constant material such as ZrO 2 , HfO 2 , Y 2 O 3 , or La 2 O 3 , or the like, or mixtures thereof, to reduce the operation voltage and to increase the memory window and reliability of the device.
摘要翻译:为铁电非易失性存储器中的一个MFMOS一个晶体管存储器结构包括高介电常数材料:例如ZrO 2,的HfO 2,Y 2 O 3,或镧,或类似物,或它们的混合物,以减少操作电压,并且增加内存窗口和 装置的可靠性。
摘要:
A MFMOS one transistor memory structure for ferroelectric non-volatile memory devices includes a high dielectric constant material such as ZrO 2 , HfO 2 , Y 2 O 3 , or La 2 O 3 , or the like, or mixtures thereof, to reduce the operation voltage and to increase the memory window and reliability of the device.