公开(公告)号：EP1246258A4

公开(公告)日：2007-07-18

申请号：EP00986014

申请日：2000-12-28

申请人： SHARP KK

发明人： IWATA HIROSHI ,  SHIBATA AKIHIDE ,  KAKIMOTO SEIZO ,  ADACHI KOUICHIRO ,  NAKANO MASAYUKI

IPC分类号： H01L21/225 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/78

CPC分类号： H01L29/66628 ,  H01L21/2251 ,  H01L21/823814 ,  H01L21/823864 ,  H01L21/823878 ,  H01L29/41783 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/7834 ,  H01L29/78657

摘要： A semiconductor device (1910) comprises a semiconductor substrate (100) including an isolation region (101) and an active region (102); a gate electrode (104) formed on gate oxide film (103) over the active area (102) and including side walls covered at least in part by insulating film (105) of the gate electrode side wall; and a source region (106) and a drain region (106) provided across the gate electrode (104) with the insulating film (105) of the gate electrode side wall in between. At least any of the source region (106) and the drain region (106) includes a second face for engagement with contact wiring. The second face makes some angle with the first face (AA') and an angle of less than 80 degrees with the surface of the isolation region.

公开(公告)号：EP1100128A4

公开(公告)日：2005-07-06

申请号：EP99926834

申请日：1999-06-29

申请人： SHARP KK

发明人： IWATA HIROSHI ,  KAKIMOTO SEIZO ,  NAKANO MASAYUKI ,  ADACHI KOUICHIRO

IPC分类号： H01L21/336 ,  H01L21/84 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L29/783 ,  H01L21/84 ,  H01L29/66628 ,  H01L29/66772 ,  H01L29/78615 ,  H01L29/78618 ,  H01L29/78654

摘要： A semiconductor device comprises a semiconductor substrate, isolation regions formed in the semiconductor substrate, a semiconductor layer of a first conductivity type formed between the isolation regions, a gate oxide layer formed on an active region of the semiconductor layer of the first conductivity type, a gate electrode formed on the gate oxide layer, an insulating layer formed on the sidewall of the gate electrode, and a semiconductor layer of a second conductivity type for source/drain formed adjacent to the insulating layer on the sidewall of the gate electrode and intended to cover part of the isolation regions. The gate electrode and the semiconductor layer of the first conductivity type are connected electrically, the semiconductor layer of the second conductivity type is formed above the semiconductor layer of the first conductivity type, and the thickness of the semiconductor layer of the second conductivity type is such that it gradually increases as the layer extends from the isolation region toward the gate electrode.