公开(公告)号：EP0234054B1

公开(公告)日：1990-10-17

申请号：EP86200948.7

申请日：1986-02-17

申请人： STC PLC

发明人： Scovell, Peter Denis ,  Blomley, Peter Fred ,  Baker, Roger Leslie

IPC分类号： H01L27/06 ,  H01L21/82 ,  H01L29/72 ,  H01L29/04

CPC分类号： H01L21/8249 ,  H01L21/8238 ,  H01L27/0623 ,  Y10S148/01

公开(公告)号：EP0202727A3

公开(公告)日：1988-03-23

申请号：EP86300865

申请日：1986-02-10

申请人： STC PLC

发明人： Scovell, Peter Denis ,  Baker, Roger Leslie ,  Blomley, Peter Fred ,  Tomkins, Gary John

IPC分类号： H01L21/00 ,  H01L21/28 ,  H01L29/08 ,  H01L29/10

CPC分类号： H01L21/0337 ,  Y10S148/01 ,  Y10S148/011 ,  Y10S148/124

摘要： A fully self-aligned polycrystalline silicon emitter bipolar transistor. Self-alignment of the p + base contact (12) is achieved by using oxidised sidewalls (8) (sidewall spacers) of the emitter mesa (7) as part of the p + base contact implantation mask. Collector contact (13) alignment can be achieved using oxidised sidewalls (17) of polycrystalline silicon alignment mesas (14) defined inthe same polysilicon asthe emitter mesa (7) but deposited on oxide (2) rather than the implanted base region (5).

公开(公告)号：EP0196757B1

公开(公告)日：1990-05-16

申请号：EP86301052.6

申请日：1986-02-17

申请人： STC PLC

发明人： Scovell, Peter Denis ,  Baker, Roger Leslie ,  Blomley, Peter Fred

IPC分类号： H01L27/06 ,  H01L21/82 ,  H01L29/04 ,  H01L29/72

CPC分类号： H01L21/8249 ,  H01L21/8238 ,  H01L27/0623 ,  Y10S148/01

公开(公告)号：EP0234054A1

公开(公告)日：1987-09-02

申请号：EP86200948.7

申请日：1986-02-17

申请人： STC PLC

发明人： Scovell, Peter Denis ,  Blomley, Peter Fred ,  Baker, Roger Leslie

IPC分类号： H01L27/06 ,  H01L21/82 ,  H01L29/72 ,  H01L29/04

CPC分类号： H01L21/8249 ,  H01L21/8238 ,  H01L27/0623 ,  Y10S148/01

摘要： A method of manufacturing a bipolar transistor (1) with semi-self-aligned p⁺ base contacts (27,27a). A base p-type region (28) is formed in a surface region of an n-type region 5 comprising a collector. An element (29) of, for example, n⁺ doped polycrystalline silicon, and comprising an emitter, is formed on the surface in contact with the base region (28). The base contacts (27,27a) are formed by implantation and using the element (29) as a mask. An n⁺ collector contact (25) is made to the n-type region (5).

摘要翻译： 一种制造具有半自对准p +基极触点（27,27a）的双极晶体管（1）的方法。 在包括集电体的n型区域5的表面区域中形成基极p型区域（28）。 在与基极区域（28）接触的表面上形成有例如n +掺杂多晶硅并且包括发射极的元件（29）。 通过注入和使用元件（29）作为掩模来形成基底触点（27,27a）。 对n型区域（5）制作n +集电极触点（25）。

公开(公告)号：EP0196757A3

公开(公告)日：1987-05-27

申请号：EP86301052

申请日：1986-02-17

申请人： STC PLC

发明人： Scovell, Peter Denis ,  Baker, Roger Leslie ,  Blomley, Peter Fred

IPC分类号： H01L27/06 ,  H01L21/82 ,  H01L29/04 ,  H01L29/72

CPC分类号： H01L21/8249 ,  H01L21/8238 ,  H01L27/0623 ,  Y10S148/01

摘要： A bipolar transistor structure (1) which can be used in an integrated circuit where bipolar (1) and CMOS transistors (2, 3) are formed simultaneously on one substrate. In integrated circuit form the material, for example polycrystalline silicon, used for the gates (11, 21) of the CMOS transistors is also used for the emitters (29) of the bipolar transistors, the collectors of the bipolar devices are comprised by doped wells (5) in the substrate (4) and the base contacts of the bipolar devices are comprised by regions (27, 27a) equivalent to source and drain regions (17, 18) of the n-well MOS transistors and bridged by base implants (28). The conventional CMOS processing is modified by the addition of two masking steps and one implant (baseimplant). One masking step defines the area for the base implant (28) and the other masking step defines an area of the oxide (30) over the base implant which must be removed to allow contact between the polycrystalline silicon (29), which is suitably doped to provide the emitter, and the base (27, 27a, 28). The base contacts are produced in a semi-self-aligned manner.

公开(公告)号：EP0196757A2

公开(公告)日：1986-10-08

申请号：EP86301052.6

申请日：1986-02-17

申请人： STC PLC

发明人： Scovell, Peter Denis ,  Baker, Roger Leslie ,  Blomley, Peter Fred

IPC分类号： H01L27/06 ,  H01L21/82 ,  H01L29/04 ,  H01L29/72

CPC分类号： H01L21/8249 ,  H01L21/8238 ,  H01L27/0623 ,  Y10S148/01

摘要： A bipolar transistor structure (1) which can be used in an integrated circuit where bipolar (1) and CMOS transistors (2, 3) are formed simultaneously on one substrate. In integrated circuit form the material, for example polycrystalline silicon, used for the gates (11, 21) of the CMOS transistors is also used for the emitters (29) of the bipolar transistors, the collectors of the bipolar devices are comprised by doped wells (5) in the substrate (4) and the base contacts of the bipolar devices are comprised by regions (27, 27a) equivalent to source and drain regions (17, 18) of the n-well MOS transistors and bridged by base implants (28). The conventional CMOS processing is modified by the addition of two masking steps and one implant (baseimplant). One masking step defines the area for the base implant (28) and the other masking step defines an area of the oxide (30) over the base implant which must be removed to allow contact between the polycrystalline silicon (29), which is suitably doped to provide the emitter, and the base (27, 27a, 28). The base contacts are produced in a semi-self-aligned manner.

公开(公告)号：EP0130553A2

公开(公告)日：1985-01-09

申请号：EP84107408.1

申请日：1984-06-27

申请人： STC PLC

发明人： Blomley, Peter Fred ,  Arton, Kenneth Alexander Manson ,  Whittaker, Edward John Wemyss ,  Lefevre, Andrew Paul

IPC分类号： H04M9/08 ,  H04M1/00

CPC分类号： H04M9/085 ,  H04M1/6033 ,  H04M1/76 ,  H04M9/08 ,  H04M19/04

摘要： An integrated circuit for a telephone instrument provides the basic (POT) service requirement. The circuit has means whereby the transmit and receive channels may be fed via controlled attenuators incorporated in an ancillary circuit to provide hands-free operation. The circuit also includes a current limited power supply whereby connection to a further ancillary circuit including an audio amplifier may be effected to provide loudspeaker operation.

摘要翻译： 用于电话仪器的集成电路提供基本（POT）服务要求。 该电路具有这样的装置，其中发射和接收信道可以通过并入辅助电路中的受控衰减器馈送以提供免提操作。 电路还包括电流有限的电源，由此可以实现与包括音频放大器的另外的辅助电路的连接以提供扬声器操作。