摘要:
A circuit for diagnosing the state of a load (LD) comprises a DMOS transistor (DMOS1) interposed between a terminal (OUT) of the load (LD) and voltage comparator circuits (CDT) in order to limit the maximum voltage input to the comparators (CDT) to reduce the circuit area occupied by the comparators (CDT) and consequently the cost of the diagnosis circuit.
摘要:
An electronic circuit with suppression of high-voltage transients on the power supply line, comprising at least one pair of power transistors (T1, T2) which are series-connected between a power source and the ground, each power transistor being provided with a respective driving circuit (1, 2); the electronic circuit comprises, for each one of the transistors (T1, T2) of the pair, a diode (D1, D2) and a Zener diode (Z1, Z2), the diode (D1) of the transistor (T1) connected to the supply voltage being connected, by means of its anode terminal, to the base terminal of the transistor (T1, T2) and, by means of its cathode terminal, to the cathode terminal of the Zener diode (Z1), the anode terminal whereof is connected to the power source, the cathode terminal of the Zener diode (Z2) of the transistor (T2) that is connected to the ground being connected to the anode terminal of the Zener diode (Z1) related to the transistor (T1) that is connected to the power supply.