利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

35 条记录 (耗时 0.014 秒)

    A circuit and a method for extending the output voltage range of an integrator circuit
    1.
    发明公开
    A circuit and a method for extending the output voltage range of an integrator circuit 审中-公开
    Schaltkreis und Verfahren zur Erweiterung des Ausgangsspannungsbereichs eines集成商

    公开(公告)号：EP1113254A1

    公开(公告)日：2001-07-04

    申请号：EP99830814.2

    申请日：1999-12-30

    申请人： STMicroelectronics S.r.l. ,  MAGNETI MARELLI S.p.A.

    发明人： Mazzucco, Michelangelo ,  Poletto, Vanni ,  Protti, Melano Carlo Lorenzo

    IPC分类号： G01L23/22 ,  G06J1/00

    CPC分类号： G01L23/225 ,  G06J1/00

    摘要： A circuit and a method are described for extending the output voltage range of an integrator circuit (22) wherein the input signal (V r ) is such as to produce an output signal (V o ) the voltage of which develops monotonically within a predetermined range of possible values.
    The integrator circuit (22) is driven in a manner such that, within an integration time period (T i ), each time the signal (V o ) at its output reaches a limit of the range of values, the integrator circuit (22) starts a subsequent integration stage of the input signal (V r ) in which the output signal (V o ) develops again within the above-mentioned range. This takes place by resetting of the integrator circuit (22) or by reversal of the characteristic slope of the output signal (V o ).
    The actual voltage value (V out ) of the signal is calculated from the counting of the reset pulses.

    摘要翻译： 描述了用于扩展积分器电路（22）的输出电压范围的电路和方法，其中输入信号（Vr）产生其电压在可能的预定范围内单调呈现的输出信号（Vo） 值。 积分器电路（22）以这样的方式驱动，使得在积分时间段（Ti）内，每当其输出端的信号（Vo）达到值范围的极限时，积分器电路22将启动 输出信号（Vr）的后续积分级，其中输出信号（Vo）再次产生在上述范围内。 这通过复位积分器电路（22）或通过反转输出信号（Vo）的特性斜率来进行。 信号的实际电压值（Vout）由复位脉冲的计数来计算。

    A system for the complete diagnosis of a driver
    2.
    发明公开
    A system for the complete diagnosis of a driver 有权
    Einrichtung zurvollständigen诊断eine Treibers

    公开(公告)号：EP1052518A1

    公开(公告)日：2000-11-15

    申请号：EP99830294.7

    申请日：1999-05-13

    申请人： STMicroelectronics S.r.l. ,  MAGNETI MARELLI S.p.A.

    发明人： Milanesi, Andrea ,  Chicca, Stefania ,  Poletto, Vanni ,  Giorgetta, Valerio ,  Sgatti, Stefano ,  Vigna, Sergio

    IPC分类号： G01R31/02

    CPC分类号： G01R31/024

    摘要： A system is described for the diagnosis of a driver (D) of the type adapted to detect one or more circuit anomalies which can occur in the said driver, including:

    voltage comparator circuits (10, 20) adapted to generate diagnostic logic signals (F 1 , F 2 , F 3 ) each indicative of the existence of a corresponding type of anomaly; and
    a coding circuit (M, SM) adapted to receive these diagnostic signals (F 1 , F 2 , F 3 ) and to output information relating to an overall operating state of the circuit. The coding circuit (M, SM) includes a first portion adapted to provide at its output first logic signals (SHB, SHG, OL) indicative of the last anomaly occurred since a system reset operation, and a second portion for coding such first logic signals (SHB, SHG, OL). The second portion includes a sequential logic network (SM) adapted to:


    receive the first logic input signals (SHB, SHG, OL) and at least one second logic signal (IN) indicative of the current operating phase of the driver (D); and
    achieve, as a function of the said first and second logic signals (SHB, SHG, OL; IN) a stable internal state such as to determine at the output information in the form of an N bit coded word representative of an occurred anomaly, of a condition of absence of anomaly in the current operating phase, or of a condition of absence of anomaly in any operating phase.

    摘要翻译： 描述了用于诊断适于检测可能发生在所述驱动器中的一个或多个电路异常的类型的驱动器（D）的系统，包括：适于产生诊断逻辑信号的电压比较器电路（10,20）（F1 ，F2，F3），每个指示存在相应类型的异常; 以及适于接收这些诊断信号（F1，F2，F3）的编码电路（M，SM），并且输出与电路的总体工作状态有关的信息。 编码电路（M，SM）包括适于在其输出端提供指示自系统复位操作以来发生的最后异常的第一逻辑信号（SHB，SHG，OL）的第一部分和用于对这些第一逻辑信号进行编码的第二部分 （SHB，SHG，OL）。 第二部分包括适于：接收第一逻辑输入信号（SHB，SHG，OL）的顺序逻辑网络（SM）和指示驾驶员（D）的当前操作阶段的至少一个第二逻辑信号（IN）; 并且作为所述第一和第二逻辑信号（SHB，SHG，OL; IN）的函数实现稳定的内部状态，例如以表示发生的异常的N位编码字的形式在输出信息处确定， 在当前运行阶段没有异常的情况，或任何运行阶段没有异常的情况。

    A circuit for controlling the maximum current in a power-MOS transistor used for driving a load connected to ground
    7.
    发明公开
    A circuit for controlling the maximum current in a power-MOS transistor used for driving a load connected to ground 失效
    电路，用于控制在功率MOS晶体管具有连接到地的负载的最大电流。

    公开(公告)号：EP0574646A1

    公开(公告)日：1993-12-22

    申请号：EP92830308.0

    申请日：1992-06-16

    申请人： SGS-THOMSON MICROELECTRONICS S.r.l. ,  MAGNETI MARELLI S.p.A.

    发明人： Poma, Alberto ,  Poletto, Vanni ,  Morelli, Marco

    IPC分类号： H03K17/06 ,  H03K17/08

    CPC分类号： H03K17/0822 ,  H03F1/523 ,  H03K17/063

    摘要： A resistor (R S ) is in series with the drain-source path of the MOS power transistor (M1). The supply terminal (s) of a transconductance operational amplifier (A) is connected to the output of a voltage-raising or charge pump (CP) circuit which can output a voltage higher than that of the voltage supply (V s ) to which the drain of the MOS transistor (M1) is connected. The inputs of the amplifier (A) are connected to the resistor (R S ) and its output is connected to the gate of the MOS transistor (M1) so that, in operation, the maximum current flowing through the power transistor (M1) is limited to a value proportional to a reference voltage (V R ).

    摘要翻译： 电阻器（RS）与所述MOS功率晶体管（M1）的漏极 - 源极路径系列。 跨导运算放大器（A）的电源端子（一个或多个）连接到一电压上升或电荷泵的输出（CP）电路，可输出的电压比所述电源电压（VS）到哪个漏极的高 MOS晶体管（M1）被连接。 所述放大器（A）的输入端被连接到电阻器（RS），并且其输出被连接到MOS晶体管（M1）的栅极，使得在操作中，流过功率晶体管的最大电流（M1）是有限 到正比于基准电压（VR）的值。

    A comparator circuit with precision hysteresis and high input impedance
    8.
    发明公开
    A comparator circuit with precision hysteresis and high input impedance 失效
    Komparatorschaltung mitPräzisionshystereseund hoher Eingangsimpedanz。

    公开(公告)号：EP0493750A2

    公开(公告)日：1992-07-08

    申请号：EP91121775.0

    申请日：1991-12-19

    申请人： SGS-THOMSON MICROELECTRONICS S.r.l. ,  MAGNETI MARELLI S.p.A.

    发明人： Poletto, Vanni ,  Mazzucco, Michelangelo

    IPC分类号： H03K3/023

    CPC分类号： H03K3/02337

    摘要： The amplitude of the hysteresis of the circuit is determined principally by the intensity of the current (Io) produced by a generator by means of a "band gap" reference voltage, an internal resistance of the circuit, and the resistances (Rx and Ry) connected to the emitters of the input-stage transistors (Q1, Q2), enabling a high degree of precision to be achieved. The inputs of the circuit are defined by the bases of the input-stage transistors (Q1, Q2) and therefore have high impedance.
    The preferred application is for forming interface circuits for sensors to be fitted in motor vehicles.

    摘要翻译： 电路的滞后幅度主要由发电机通过“带隙”参考电压，电路的内部电阻和电阻（Rx和Ry）产生的电流强度（Io）确定， 连接到输入级晶体管（Q1，Q2）的发射极，能够实现高精度。 电路的输入由输入级晶体管（Q1，Q2）的基极限定，因此具有高阻抗。 优选的应用是形成用于安装在机动车辆中的传感器的接口电路。

    Power transistor control circuit for a voltage regulator
    10.
    发明公开
    Power transistor control circuit for a voltage regulator 失效
    LeistungstransistorsteuerschaltungfürSpannungsregler

    公开(公告)号：EP0846996A1

    公开(公告)日：1998-06-10

    申请号：EP96830610.0

    申请日：1996-12-05

    申请人： SGS-THOMSON MICROELECTRONICS s.r.l. ,  MAGNETI MARELLI S.p.A.

    发明人： Milanesi, Andrea ,  Poletto, Vanni ,  Poma, Alberto ,  Morelli, Marco

    IPC分类号： G05F1/575

    CPC分类号： G05F1/575

    摘要： A voltage-regulator circuit with a low voltage drop using a DMOS power transistor (PT) driven by a charge pump (CP) comprises two feedback loops: a first feedback loop having high gain and accuracy but low response speed, and a second feedback loop having a wide passband and fast response speed but low gain.

    摘要翻译： 使用由电荷泵（CP）驱动的DMOS功率晶体管（PT）具有低压降的电压调节器电路包括两个反馈回路：具有高增益和精度但响应速度低的第一反馈环路和第二反馈回路 具有宽通带和快速响应速度但低增益。