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    RATE MATCHING DEVICE AND METHOD FOR A DATA COMMUNICATION
    1.
    发明公开
    RATE MATCHING DEVICE AND METHOD FOR A DATA COMMUNICATION 审中-公开
    瑞典天文台

    公开(公告)号：EP2991269A1

    公开(公告)日：2016-03-02

    申请号：EP15187659.6

    申请日：2000-07-06

    申请人： Samsung Electronics Co., Ltd

    发明人： KIM, Min-Goo ,  KIM, Beong-Jo ,  KIM, Se-Hyong ,  CHOI, Soon-Jae ,  LEE, Young-Hwan

    IPC分类号： H04L12/00 ,  H03M13/29 ,  H03M13/00 ,  H04L1/00

    CPC分类号： H04L1/0041 ,  H03M13/2957 ,  H03M13/2993 ,  H03M13/6356 ,  H03M13/6362 ,  H03M13/6513 ,  H03M13/6569 ,  H04L1/0059 ,  H04L1/0066 ,  H04L1/0069 ,  H04L1/08

    摘要： A device and method for matching a rate of channel-encoded symbols in a data communication system. The rate matching device and method can be applied to a data communication system which uses one or both of a non-systematic code (such as a convolution code or a linear function code) and a systematic code (such as a turbo code). The rate matching device includes a plurality of rate matching functions, the number of the rate matching functions being equal to a reciprocal of a coding rate of a channel encoder. The rate matching device can rate match the symbols encoded with a non-systematic code or the symbols encoded with a systematic code, by changing initial parameters including the number of input symbols, the number of output symbols, and the puncturing/repetition pattern determining parameter.

    摘要翻译： 一种用于匹配数据通信系统中的信道编码符号的速率的装置和方法。 速率匹配装置和方法可以应用于使用非系统码（例如卷积码或线性函数码）和系统码（例如turbo码）中的一个或两个的数据通信系统。 速率匹配装置包括多个速率匹配功能，速率匹配功能的数量等于信道编码器的编码率的倒数。 速率匹配装置可以通过改变包括输入符号的数量，输出符号的数量和穿孔/重复模式确定参数的初始参数来对与非系统代码编码的符号或用系统代码编码的符号进行速率匹配 。

    ADDRESS GENERATING DEVICE FOR USE IN MULTI-STAGE CHANNEL INTERLEAVER/DEINTERLEAVER
    2.
    发明授权
    ADDRESS GENERATING DEVICE FOR USE IN MULTI-STAGE CHANNEL INTERLEAVER/DEINTERLEAVER 有权
    地址发生装置用在多级信道交织器/解交织器

    公开(公告)号：EP1203452B1

    公开(公告)日：2008-09-17

    申请号：EP00942514.1

    申请日：2000-07-13

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： SU, Sung-Il ,  KIM, Beong-Jo

    IPC分类号： H03M13/27

    CPC分类号： H03M13/2764 ,  H03M13/271

    摘要： An address generating device for addressing data stored in an interleaver memory in B rows and F columns, where F is not 2k for a positive integer k. A row counter being responsive to B clock pulses, outputs carry signal when the row counter count to B-1, outputs the 0 value when the first row address is outputting, outputs the added value of offset value F and previous output value of the row counter, and generates a counter reset signal when output the carry signal. The B is the number of rows. A column counter increases a count value in increments of one in response to the carry signal. A mapper permutates the output of the counter according to a predetermined permutation rule. An adder generates a read address by using the output of the row counter as the most significant bits (MSB) of the read address and by using the output of the mapper as the least significant bits (LSB) of the read address.

    DATA TRANSMISSION APPARATUS AND METHOD FOR AN HARQ DATA COMMUNICATION SYSTEM
    5.
    发明公开
    DATA TRANSMISSION APPARATUS AND METHOD FOR AN HARQ DATA COMMUNICATION SYSTEM 审中-公开
    对于混合的教育体系，AUTOMATISHER WIEDERHOLUNGSAUFORDERUNG数据传输装置及方法

    公开(公告)号：EP1192750A1

    公开(公告)日：2002-04-03

    申请号：EP01932381.5

    申请日：2001-05-22

    申请人： Samsung Electronics Co., Ltd.

    发明人： KIM, Min-Goo ,  KIM, Se-Hyoung ,  CHOI, Soon-Jae ,  KIM, Beong-Jo

    IPC分类号： H04L1/00

    CPC分类号： H04L1/1845 ,  H04L1/005 ,  H04L1/0066 ,  H04L1/0069 ,  H04L1/1819

    摘要： Disclosed is an apparatus for transmitting a sequence of information bits and sequences of parity bits to a receiver in a transmitter of an HARQ transmission system. A turbo encoder receives a sequence of L information bits, and generates the sequence of information bits and M sequences of L parity bits for the information bits, wherein M is determined depending on a transmission code rate. A redundancy selector includes the sequence of information bits in an initial data block during initial transmission, and uniformly includes non-transmitted parity bits out of parity bits provided from each sequence of the parity bits in a retransmission data block upon every receipt of a retransmission request from the receiver.

    INTERLEAVING / DEINTERLEAVING APPARATUS AND METHOD FOR A COMMUNICATION SYSTEM
    7.
    发明公开
    INTERLEAVING / DEINTERLEAVING APPARATUS AND METHOD FOR A COMMUNICATION SYSTEM 审中-公开
    供应和ENTSCHACHTELLUNGSAPPARAT和方法的通信系统

    公开(公告)号：EP1095460A1

    公开(公告)日：2001-05-02

    申请号：EP00915575.5

    申请日：2000-04-03

    申请人： Samsung Electronics Co., Ltd.

    发明人： KIM, Min-Goo ,  KIM, Beong-Jo ,  LEE, Young-Hwan

    IPC分类号： H03M13/00

    CPC分类号： H03M13/2771 ,  H03M13/2764

    摘要： A device for generating L addresses, which are smaller in number than 2mxNg virtual addresses, for reading data from an interleaver memory in which L data bits are stored, the device including : Ng PN generators each including m memories; an address generator for adding an offset value to the input data size to provide a virtual address having a size of a multiple of 2m, and generating addresses other than addresses corresponding to the offset value in address generation areas using the address generation areas having the size of 2m; and means for reading the input data from the interleaver memory using the addresses generated from the address generation areas.

    PUNCTURING DEVICE AND METHOD FOR TURBO ENCODER IN MOBILE COMMUNICATION SYSTEM
    8.
    发明公开
    PUNCTURING DEVICE AND METHOD FOR TURBO ENCODER IN MOBILE COMMUNICATION SYSTEM 有权
    PUNKTIERUNGSGERÄT和TURBOKODER方法，在移动通信系统

    公开(公告)号：EP1060580A1

    公开(公告)日：2000-12-20

    申请号：EP99962552.8

    申请日：1999-12-31

    申请人： Samsung Electronics Co., Ltd.

    发明人： LEE, Young-Hwan ,  KIM, Min-Goo ,  KIM, Beong-Jo

    IPC分类号： H04B7/26

    CPC分类号： H04L1/0059 ,  H03M13/2957 ,  H03M13/6362 ,  H04L1/0041 ,  H04L1/005 ,  H04L1/0066 ,  H04L1/0069 ,  H04L1/007

    摘要： A puncturing device for a turbo encoder in a mobile communication system having a turbo encoder which turbo encodes input source data into a plurality of information frames and tail symbols at a given code rate is disclosed. The puncturing device comprises a frame generator for generating a transmission frame by performing puncturing and adding invalid symbols; and a controller for performing puncturing on the information frames according to the code rate, puncturing the tail symbols only when the number of punctured information frames and tail symbols exceeds a bit number according to a symbol rate, and otherwise, controlling the frame generator by reading a puncturing pattern according to the code rate and information about the number of invalid symbols.

    Turbo Decoding with soft-output Viterbi decoder
    10.
    发明授权
    Turbo Decoding with soft-output Viterbi decoder 有权
    与软输出维特比解码器的turbo解码

    公开(公告)号：EP1135877B1

    公开(公告)日：2008-02-06

    申请号：EP00966576.1

    申请日：2000-10-05

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： KIM, Min-Goo ,  KIM, Beong-Jo ,  LEE, Young-Hwan

    IPC分类号： H03M13/41 ,  H03M13/29 ,  H03M13/45

    CPC分类号： H04L1/0054 ,  H03M13/2957 ,  H03M13/4107 ,  H03M13/4146 ,  H03M13/4184 ,  H03M13/6583 ,  H04L1/0052

    摘要： There is provided a decoder and a decoding method for decoding data modulated with a recursive systematic convolutional code (RSC) in a mobile communication system. In the decoder, a branch metric calculating circuit (BMC) calculates branch metrics (BMs) associated with a plurality of input symbols. An add-compare-select circuit (ACS) receives the BMs and previous path metrics (PMs) and generates a plurality of path selectors and LLR (Log Likelihood Ratio) data including the plurality of path selectors and reliability information at a first time instant. A maximum likelihood (ML) state searcher has a plurality of cells in an array with rows and columns, connected to one another according to an encoder trellis, cells in each row having a process time, Ds, for outputting the same value of the cells in the last column as an ML state value representing an ML path in response to the path selectors. A delay delays the LLR data received from the ACS by the time Ds. An LLR update circuit has a plurality of processing elements (PEs) in an array with rows and columns, connected according to the encoder trellis, PEs in each row having a process time, DL, for generating updated LLR values from the PEs at a time instant (first time instant - approximately Ds+DL) in response to the delayed LLR data received from the delay. A selector selects one of the updated LLR values based on the ML state value.