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公开(公告)号：EP1000364B1
公开(公告)日：2002-10-23
申请号：EP98935953.4
申请日：1998-07-22
申请人： TERADYNE, INC.
IPC分类号： G01R31/319 , H03K5/13
CPC分类号： H03L7/0805 , G01R31/3191 , G01R31/31922 , H03K5/131 , H03K5/133 , H03K2005/00026 , H03K2005/00065 , H03K2005/00071 , H03K2005/00195 , H03K2005/00208 , H03L7/0812
摘要： Automatic test equipment for testing semiconductor devices equipment includes a) a clock; b) a delay line comprised of a plurality of delay stages (212), each delay stage (212) having an input and an output and a control input, with the input of the first delay stage (212(0)) coupled to the clock and the input of every other delay stage coupled to the output of the preceding stage in the delay line; said automatic test equipment characterised by: c) a phase detector (214) having a first input coupled to an output of a delay stage in the delay line and in an input coupled to the output of a prior delay stage in the delay line; and d) a control circuit (216) having an input coupled to the output of the phase detector and an output connected to the control inputs of each of the delay stages in the delay line.
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公开(公告)号：EP1929318A1
公开(公告)日：2008-06-11
申请号：EP06804150.8
申请日：2006-09-26
申请人： Teradyne, Inc.
IPC分类号： G01R31/319
CPC分类号： G01R31/31924
摘要： Circuitry for driving a pin of a device includes a first circuit path terminating in a first impedance, a second circuit path terminating in a second impedance, where the second impedance is less than the first impedance, and a selection circuit to control operation of the second circuit path. When the second circuit path is not configured for operation, the first circuit path is configured to output one of plural first voltage signals. When the second circuit path is in configured for operation, the second circuit path is configured to output a second voltage signal. The second voltage signal is greater than the plural first voltage signals.
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3.发明授权LOW-COST CONFIGURATION FOR MONITORING AND CONTROLLING PARAMETRIC MEASUREMENT UNITS IN AUTOMATIC TEST EQUIPMENT 有权实价配置用于检测和控制参数测量单元在自动测试设备
公开(公告)号：EP1157279B1
公开(公告)日：2007-04-18
申请号：EP00914494.0
申请日：2000-02-03
申请人： Teradyne, Inc.
IPC分类号： G01R31/319
CPC分类号： G01R31/31908 , G01R31/3191 , G01R31/31924
摘要： Pin slice circuitry used in automatic test equipment is disclosed. The pin slice circuitry includes a portion implemented using CMOS technology and a portion implemented using bipolar technology. The CMOS portion includes a plurality of timing generator circuits, digital sigma delta modulator circuitry used to generate digital bit streams representative of analog reference levels, and programmable digital signal processing circuitry. The bipolar portion includes driver/receiver channels, a parametric measurement unit, and decoder circuitry, which produces the analog reference levels from the digital bit streams generated by the modulator circuitry. The analog reference levels are used by the driver/receiver channels and the parametric measurement unit; and, the digital signal processing circuitry is used to monitor and control levels produced by the parametric measurement unit. The disclosed pin slice circuitry has the advantages of reduced size and cost as compared with conventional pin slice circuitry.
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4.发明公开AUTOMATIC TEST EQUIPMENT USING SIGMA DELTA MODULATION TO CREATE REFERENCE LEVELS 有权Σ-Δ调制的用于产生参考水平自动测试设备
公开(公告)号：EP1149298A1
公开(公告)日：2001-10-31
申请号：EP00908478.1
申请日：2000-02-03
申请人： TERADYNE, INC.
IPC分类号： G01R31/319 , H03M3/02
CPC分类号： G01R31/31908 , G01R31/31924
摘要： Pin slice circuitry used in automatic test equipment is disclosed. The pin slice circuitry includes a portion implemented using CMOS technology and a portion implemented using bipolar technology. The CMOS portion includes a plurality of timing generator circuits and sigma delta modulator circuitry, which is used to generate digital bit streams representative of analog reference levels. The bipolar portion includes driver/receiver channels, a parametric measurement unit, and decoder circuitry, which produces the analog reference levels from the digital bit streams generated by the modulator circuitry. The analog reference levels are used by the driver/receiver channels and the parametric measurement unit. The disclosed pin slice circuitry has the advantages of reduced size and cost as compared with conventional pin slice circuitry.
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公开(公告)号：EP1927203A2
公开(公告)日：2008-06-04
申请号：EP06804013.8
申请日：2006-09-22
申请人： Teradyne, Inc.
IPC分类号： H04B17/00
CPC分类号： G01R31/31937 , G01R31/31726 , G11C29/56 , G11C29/56004 , G11C29/56012
摘要： A test system timing method simulates the timing of a synchronous clock on the device under test. Strobe pulses can be generated by routing an edge generator to delay elements with incrementally increasing delay values. A data signal or synchronous clock signal can be applied to the input of each of a set of latches which are clocked by the strobe pulses. An encoder can convert the series of samples which are thereby latched to a word representing edge time and polarity of the sampled signal. If the sampled signal is a data signal, the word can be stored in memory. If the sampled signal is a clock signal, the word is routed to a clock bus and used to address the memory. The difference between clock edge time and data edge time is provided and can be compared against expected values.
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6.发明公开USING A PARAMETRIC MEASUREMENT UNIT TO SENSE A VOLTAGE AT A DEVICE UNDER TEST 审中-公开使用参数测量单元，用于感测元件的电压进行检查
公开(公告)号：EP1825283A1
公开(公告)日：2007-08-29
申请号：EP05854427.1
申请日：2005-12-16
申请人： Teradyne, Inc.
IPC分类号： G01R31/28
CPC分类号： G01R31/31924
摘要： Circuitry for use in testing a device includes a first measurement unit to apply a forced voltage to the device, and a second measurement unit having functionality that is disabled. The second measurement unit includes a sense path to receive a sensed voltage from the device, where the sense path connects to the first measurement unit through the second measurement unit. The first measurement unit adjusts the forced voltage based on the sensed voltage.
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7.发明授权AUTOMATIC TEST EQUIPMENT USING SIGMA DELTA MODULATION TO CREATE REFERENCE LEVELS 有权Σ-Δ调制的用于产生参考水平自动测试设备
公开(公告)号：EP1149298B1
公开(公告)日：2003-05-21
申请号：EP00908478.1
申请日：2000-02-03
申请人： TERADYNE, INC.
IPC分类号： G01R31/319 , H03M3/02
CPC分类号： G01R31/31908 , G01R31/31924
摘要： Pin slice circuitry used in automatic test equipment is disclosed. The pin slice circuitry includes a portion implemented using CMOS technology and a portion implemented using bipolar technology. The CMOS portion includes a plurality of timing generator circuits and sigma delta modulator circuitry, which is used to generate digital bit streams representative of analog reference levels. The bipolar portion includes driver/receiver channels, a parametric measurement unit, and decoder circuitry, which produces the analog reference levels from the digital bit streams generated by the modulator circuitry. The analog reference levels are used by the driver/receiver channels and the parametric measurement unit. The disclosed pin slice circuitry has the advantages of reduced size and cost as compared with conventional pin slice circuitry.
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8.发明公开LOW-COST CONFIGURATION FOR MONITORING AND CONTROLLING PARAMETRIC MEASUREMENT UNITS IN AUTOMATIC TEST EQUIPMENT 有权实价配置用于检测和控制参数测量单元在自动测试设备
公开(公告)号：EP1157279A1
公开(公告)日：2001-11-28
申请号：EP00914494.0
申请日：2000-02-03
申请人： TERADYNE, INC.
IPC分类号： G01R31/319
CPC分类号： G01R31/31908 , G01R31/3191 , G01R31/31924
摘要： Pin slice circuitry used in automatic test equipment is disclosed. The pin slice circuitry includes a portion implemented using CMOS technology and a portion implemented using bipolar technology. The CMOS portion includes a plurality of timing generator circuits, digital sigma delta modulator circuitry used to generate digital bit streams representative of analog reference levels, and programmable digital signal processing circuitry. The bipolar portion includes driver/receiver channels, a parametric measurement unit, and decoder circuitry, which produces the analog reference levels from the digital bit streams generated by the modulator circuitry. The analog reference levels are used by the driver/receiver channels and the parametric measurement unit; and, the digital signal processing circuitry is used to monitor and control levels produced by the parametric measurement unit. The disclosed pin slice circuitry has the advantages of reduced size and cost as compared with conventional pin slice circuitry.
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公开(公告)号：EP1927204A2
公开(公告)日：2008-06-04
申请号：EP06804068.2
申请日：2006-09-22
申请人： Teradyne, Inc.
IPC分类号： H04B17/00
CPC分类号： G01R31/31937 , G01R31/31726 , G11C29/56 , G11C29/56004 , G11C29/56012
摘要： A system and apparatus generates a time-stamp to identify and record the time of an event such as an edge received in a data signal or clock signal. A set of strobe pulses can be generated by routing an external clock signal to delay elements with incrementally increasing delay values. A data signal or device under test clock signal can be applied to the input to each of a set of latches which are clocked by the strobe pulses. The set of latches can thereby capture a series of samples of the data signal or clock signal. The series of samples can be encoded as an edge time within a clock cycle. A clock cycle counter can be added to the edge time to generate the time stamp.
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公开(公告)号：EP1459081B1
公开(公告)日：2005-06-08
申请号：EP02790091.9
申请日：2002-12-11
申请人： TERADYNE, INC.
发明人： SARTSCHEV, Ronald, A. , XU, Jun
IPC分类号： G01R31/3193 , G01R31/319 , G11C29/00
CPC分类号： G11C29/56012 , G01R31/3193 , G01R31/31937 , G11C29/56
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