摘要:
An interface circuit for a single logic input pin of an electronic system, comprising a decoder 10 for converting a pulse coded signal applied to said pin to a sequence of logic low and logic high values, and a state machine 12 responsive to said sequence of logic values to switch the electronic system between different modes of operation.
摘要:
An interface circuit for a single logic input pin of an electronic system, comprising a decoder 10 for converting a pulse coded signal applied to said pin to a sequence of logic low and logic high values, and a state machine 12 responsive to said sequence of logic values to switch the electronic system between different modes of operation.
摘要:
A driver circuit generates an adjustable output signal current at a driver output, which corresponds in each case to one or the other binary data level of an input signal. The driver circuit comprises n partial driver circuits (TT1-TT7), connected in parallel both at the input and at the output sides, which may be set into either an active or an inactive state for the purpose of setting the output signal current by means of a setting signal. In their active state each driver circuit delivers at each of its outputs a partial signal current relative to a constant reference current (Iref), depending on the data level of the input signal. The sum of the partial signal currents corresponds to the set output signal current. The input signals (INP, INN) are applied to a first partial driver circuit (TT1) directly, and to a second to nth partial driver circuit (TT2-TT7) via 1, 2, ... or n-1 delay elements (DP1-DP6, DN1-DN6) after a time delay of 1xΔt, 2xΔt up to (n-1)xΔt.