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    METHODS, STRUCTURES AND DESIGNS FOR SELF-ALIGNING LOCAL INTERCONNECTS USED IN INTEGRATED CIRCUITS
    1.
    发明公开
    METHODS, STRUCTURES AND DESIGNS FOR SELF-ALIGNING LOCAL INTERCONNECTS USED IN INTEGRATED CIRCUITS 审中-公开
    用于集成电路中自对准局部互连的方法，结构和设计

    公开(公告)号：EP3188217A2

    公开(公告)日：2017-07-05

    申请号：EP17151880.6

    申请日：2008-10-20

    申请人： Tela Innovations, Inc.

    发明人： Smayling, Michael C ,  Becker, Scott T

    IPC分类号： H01L21/285 ,  H01L21/768 ,  H01L21/8234 ,  H01L27/088

    CPC分类号： H01L27/092 ,  G03F1/14 ,  G06F17/5077 ,  H01L21/28518 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/823475 ,  H01L21/823828 ,  H01L21/823871 ,  H01L23/528 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/105 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Methods, structures and designs for self-aligned local interconnects are provided. The method includes designing diffusion regions to be in a substrate. Some of a plurality of gates are designed to be active gates and some of the plurality of gates are designed to be formed over isolation regions. The method includes designing the plurality of gates in a regular and repeating alignment along a same direction, and each of the plurality of gates are designed to have dielectric spacers. The method also includes designing a local interconnect layer between or adjacent to the plurality of gates. The local interconnect layer is conductive and disposed over the substrate to allow electrical contact and interconnection with or to some of the diffusion regions of the active gates. The local interconnect layer is self-aligned by the dielectric spacers of the plurality of gates.

    摘要翻译： 提供了自对准局部互连的方法，结构和设计。 该方法包括将扩散区域设计为在衬底中。 多个栅极中的一些被设计成有源栅极，并且多个栅极中的一些被设计为形成在隔离区域上方。 该方法包括沿着相同方向以规则且重复对齐的方式设计多个栅极，并且多个栅极中的每一个被设计为具有电介质间隔件。 该方法还包括设计多个栅极之间或与多个栅极相邻的局部互连层。 局部互连层是导电的并且设置在衬底上方以允许与有源栅极的一些扩散区域电接触和互连或者与有源栅极的一些扩散区域互连。 局部互连层由多个栅极的电介质间隔物自对准。

    Methods, structures and designs for self-aligning local interconnects used in integrated circuits
    3.
    发明公开
    Methods, structures and designs for self-aligning local interconnects used in integrated circuits 审中-公开
    过程，结构和设计的自对准局部互连在集成电路中的使用

    公开(公告)号：EP2592648A1

    公开(公告)日：2013-05-15

    申请号：EP13154840.6

    申请日：2008-10-20

    申请人： Tela Innovations, Inc.

    发明人： Smayling, Michael C ,  Becker, Scott T

    IPC分类号： H01L21/8238 ,  H01L21/768 ,  H01L21/285

    CPC分类号： H01L27/092 ,  G03F1/14 ,  G06F17/5077 ,  H01L21/28518 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/823475 ,  H01L21/823828 ,  H01L21/823871 ,  H01L23/528 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/105 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Methods, structures and designs for self-aligned local interconnects are provided. The method includes designing diffusion regions to be in a substrate. Some of a plurality of gates (74, 74a, 74b) are designed to be active gates (74) and some of the plurality of gates (74a, 74b) are designed to be formed over isolation regions. The method includes designing the plurality of gates in a regular and repeating alignment along a same direction, and each of the plurality of gates are designed to have dielectric spacers. The method also includes designing a local interconnect layer (196, 196') between or adjacent to the plurality of gates. The local interconnect layer is conductive and disposed over the substrate to allow electrical contact and interconnection with or to some of the diffusion regions (64, 68) of the active gates. The local interconnect layer is self-aligned by the dielectric spacers of the plurality of gates.

    摘要翻译： 提供一些方法，结构和设计的自对准局部互连。 该方法包括设计的扩散区是在一个基片。 一些门的多个（74，74A，74B）被设计为有源栅极（74）和一些门的多个（74A，74B）被设计为形成在隔离区。 该方法包括设计门中的多个沿同一方向上具有规则和重复的排列，并且每个栅的多个被设计成具有介电间隔件。 因此，该方法包括之间或邻近于栅极的多元性设计局部互连层（196，196“）。 局部互连层是导电的，并且设置在所述基片，以允许电接触和互连或连接到一些所述有源栅极的扩散区域（64，68）的。 局部互连层是自对准通过门的多个所述电介质间隔物。

    Methods, structures and designs for self-aligning local interconnects used in integrated circuits
    7.
    发明公开
    Methods, structures and designs for self-aligning local interconnects used in integrated circuits 有权
    Methode zur Herstellung selbstjustierter lokaler Interconnects in integrierten Schaltungen

    公开(公告)号：EP2592649A1

    公开(公告)日：2013-05-15

    申请号：EP13154842.2

    申请日：2008-10-20

    申请人： Tela Innovations, Inc.

    发明人： Smayling, Michael C ,  Becker, Scott T

    IPC分类号： H01L21/8238 ,  H01L21/768 ,  H01L21/285

    CPC分类号： H01L27/092 ,  G03F1/14 ,  G06F17/5077 ,  H01L21/28518 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/823475 ,  H01L21/823828 ,  H01L21/823871 ,  H01L23/528 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/105 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Methods, structures and designs for self-aligned local interconnects are provided. The method includes designing diffusion regions to be in a substrate. Some of a plurality of gates (74) are designed to be active gates and some of the plurality of gates are designed to be formed over isolation regions (180). The method includes designing the plurality of gates in a regular and repeating alignment along a same direction, and each of the plurality of gates are designed to have dielectric spacers (230). The method also includes designing a local interconnect layer (196) between or adjacent to the plurality of gates. The local interconnect layer is conductive and disposed over the substrate to allow electrical contact and interconnection with or to some of the diffusion regions (184) of the active gates. The local interconnect layer is self-aligned by the dielectric spacers of the plurality of gates.

    摘要翻译： 提供了自对准局部互连的方法，结构和设计。 该方法包括将扩散区域设计在衬底中。 多个栅极（74）中的一些被设计为有源栅极，并且多个栅极中的一些被设计为形成在隔离区域（180）上。 该方法包括沿相同方向以规则且重复的对准来设计多个栅极，并且多个栅极中的每一个被设计成具有电介质间隔物（230）。 该方法还包括在多个门之间或邻近设计局部互连层（196）。 局部互连层是导电的并且设置在衬底上，以允许与有源栅极的一些扩散区域（184）的电接触和互连。 局部互连层通过多个栅极的介电间隔物自对准。