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1.发明授权PROCESS FOR COLLECTIVE MANUFACTURING OF MEMBRANES AND SMALL VOLUME CAVITIES HAVING HIGH DIMENSIONAL ACCURACY 有权过程膜材和空洞对小号和大体积的尺寸稳定性的制备
公开(公告)号：EP2013137B1
公开(公告)日：2011-10-12
申请号：EP07728561.7
申请日：2007-04-26
CPC分类号： B81C1/0015 , B81B2201/054 , B81C1/00357 , B81C2201/019 , F04B43/046
摘要： The invention relates to a process for collective manufacturing of cavities and/or membranes (24), with a given thickness d, in a wafer said to be a semiconductor on insulator layer, comprising at least one semiconducting surface layer with a thickness d on an insulating layer, this insulating layer itself being supported on a substrate, this process comprising: - etching of the semiconducting surface layer with thickness d, the insulating layer forming a stop layer, to form said cavities and/or membranes in the surface layer.
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2.发明授权
公开(公告)号：EP2349915B1
公开(公告)日：2012-07-18
申请号：EP09753216.2
申请日：2009-11-10
IPC分类号： B81B7/00 , G01P1/02 , H01L23/485
CPC分类号： B81B7/007 , B81B2207/012 , B81B2207/07 , B81C2203/0118 , G01P1/023 , G01P15/0802 , H01L24/02 , H01L2224/04042 , H01L2224/48472 , H01L2924/01087 , H01L2924/10156 , H01L2924/10157 , H01L2924/10253 , H01L2924/1461 , H01L2924/00
摘要： A micro-electromechanical component produced from a semiconductor substrate, comprising an internal moving portion which includes conductive elements and contacts on its outer surface, said contacts being electrically connected to said conductive elements, said electrical contacts being capable of accommodating soldered interconnect wires which are themselves designed to be connected to electrical contacts provided on device which accommodates said component, characterized in that electrical contacts are arranged in an area which extends between upper face of the component and lateral face, said contacts having a concave shape and having two regions capable of accommodating soldered interconnect wires, said regions being substantially perpendicular to each other and parallel to said upper face and said lateral face respectively.
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3.发明公开
公开(公告)号：EP2349915A1
公开(公告)日：2011-08-03
申请号：EP09753216.2
申请日：2009-11-10
IPC分类号： B81B7/00 , G01P1/02 , H01L23/485
CPC分类号： B81B7/007 , B81B2207/012 , B81B2207/07 , B81C2203/0118 , G01P1/023 , G01P15/0802 , H01L24/02 , H01L2224/04042 , H01L2224/48472 , H01L2924/01087 , H01L2924/10156 , H01L2924/10157 , H01L2924/10253 , H01L2924/1461 , H01L2924/00
摘要： A micro-electromechanical component produced from a semiconductor substrate, comprising an internal moving portion which includes conductive elements and contacts on its outer surface, said contacts being electrically connected to said conductive elements, said electrical contacts being capable of accommodating soldered interconnect wires which are themselves designed to be connected to electrical contacts provided on device which accommodates said component, characterized in that electrical contacts are arranged in an area which extends between upper face of the component and lateral face, said contacts having a concave shape and having two regions capable of accommodating soldered interconnect wires, said regions being substantially perpendicular to each other and parallel to said upper face and said lateral face respectively.
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4.发明公开PROCESS FOR COLLECTIVE MANUFACTURING OF SMALL VOLUME HIGH PRECISION MEMBRANES AND CAVITIES 有权过程膜材和空洞对小号和大体积的尺寸稳定性的制备
公开(公告)号：EP2013137A1
公开(公告)日：2009-01-14
申请号：EP07728561.7
申请日：2007-04-26
CPC分类号： B81C1/0015 , B81B2201/054 , B81C1/00357 , B81C2201/019 , F04B43/046
摘要： The invention relates to a process for collective manufacturing of cavities and/or membranes (24), with a given thickness d, in a wafer said to be a semiconductor on insulator layer, comprising at least one semiconducting surface layer with a thickness d on an insulating layer, this insulating layer itself being supported on a substrate, this process comprising: - etching of the semiconducting surface layer with thickness d, the insulating layer forming a stop layer, to form said cavities and/or membranes in the surface layer.
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