PIXELATED IMAGER WITH MOTFT AND PROCESS
    1.
    发明授权
    PIXELATED IMAGER WITH MOTFT AND PROCESS 有权
    具有MOTFT和PROCESS的像素化成像器

    公开(公告)号:EP2932534B1

    公开(公告)日:2017-08-30

    申请号:EP13863613.9

    申请日:2013-12-09

    申请人: CBrite Inc.

    摘要: A method of fabricating a pixelated imager includes providing a substrate with bottom contact layer and sensing element blanket layers on the contact layer. The blanket layers are separated into an array of sensing elements by trenches isolating adjacent sensing elements. A sensing element electrode is formed adjacent each sensing element overlying a trench and defining a TFT. A layer of metal oxide semiconductor (MOS) material is formed on a dielectric layer overlying the electrodes and on an exposed upper surface of the blanket layers defining the sensing element adjacent each TFT. A layer of metal is deposited on each TFT and separated into source/drain electrodes on opposite sides of the sensing element electrode. The metal forming one of the S/D electrodes contacts the MOS material overlying the exposed surface of the semiconductor layer, whereby each sensing element in the array is electrically connected to the adjacent TFT by the MOS material.

    摘要翻译: 一种制造像素化成像器的方法包括在接触层上提供具有底部接触层和感测元件覆盖层的衬底。 通过隔离相邻感测元件的沟槽将覆盖层分成感测元件阵列。 感测元件电极形成在覆盖沟槽并限定TFT的每个感测元件附近。 一层金属氧化物半导体(MOS)材料形成在覆盖电极的介电层上以及在限定与每个TFT相邻的感测元件的覆盖层的暴露的上表面上。 在每个TFT上沉积金属层,并在感测元件电极的相对侧分成源极/漏极电极。 形成S / D电极中的一个的金属接触覆盖半导体层的暴露表面的MOS材料,由此阵列中的每个感测元件通过MOS材料电连接到相邻的TFT。

    SELF-ALIGNED METAL OXIDE TFT
    2.
    发明公开
    SELF-ALIGNED METAL OXIDE TFT 审中-公开
    SELBSTAUSGERICHTETER METALLOXID-TFT

    公开(公告)号:EP3066692A4

    公开(公告)日:2017-06-28

    申请号:EP14859754

    申请日:2014-11-05

    申请人: CBRITE INC

    摘要: A method of fabricating MOTFTs includes positioning opaque gate metal on a transparent substrate, depositing gate dielectric material overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material thereon. Etch stop material is deposited on the semiconductor material. Photoresist defines an isolation area in the semiconductor material. Exposing the photoresist from the rear surface of the substrate and removing exposed portions to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material to form source and drain areas.

    摘要翻译: 制造MOTFT的方法包括将不透明栅极金属设置在透明衬底上,沉积覆盖栅极金属和周围区域的栅极介电材料,并在其上沉积金属氧化物半导体材料。 蚀刻停止材料沉积在半导体材料上。 光致抗蚀剂定义了半导体材料中的隔离区。 从衬底的后表面暴露光致抗蚀剂并去除暴露部分,除了覆盖并与栅极金属对齐的部分之外,未暴露蚀刻停止材料。 蚀刻半导体材料的未覆盖部分以隔离TFT。 使用光致抗蚀剂,选择性地蚀刻蚀刻停止层以留下覆盖并与栅极金属对准的部分,并在半导体材料中限定沟道区域。 沉积并图案化导电材料以形成源极和漏极区域。

    METAL OXIDE TFT WITH IMPROVED CARRIER MOBILITY
    3.
    发明公开
    METAL OXIDE TFT WITH IMPROVED CARRIER MOBILITY 审中-公开
    METALLOXID-TFT MIT VERBESSERTERLADUNGSTRÄGERMOBILITÄT

    公开(公告)号:EP3012869A1

    公开(公告)日:2016-04-27

    申请号:EP15199954.7

    申请日:2009-07-14

    申请人: CBrite Inc.

    IPC分类号: H01L29/786 H01L29/66

    摘要: A fabrication method is used in conjunction with a semiconductor device having a metal oxide active layer less than 100nm thick and the upper major surface and the lower major surface have material in abutting engagement to form underlying interfaces and overlying interfaces. The method of fabrication includes controlling interfacial interactions in the underlying interfaces and the overlying interfaces to adjust the carrier density in the adjacent metal oxide by selecting a metal oxide for the metal oxide active layer and by selecting a specific material for the material in abutting engagement. The method also includes one or both steps of controlling interactions in underlying interfaces by surface treatment of an underlying material forming a component of the underlying interface and controlling interactions in overlying interfaces by surface treatment of the metal oxide film performed prior to deposition of material on the metal oxide layer.

    摘要翻译: 一种制造方法与具有小于100nm厚的金属氧化物活性层的半导体器件结合使用,并且上主表面和下主表面具有邻接接合的材料以形成下面的界面和上覆界面。 制造方法包括通过选择用于金属氧化物活性层的金属氧化物并通过选择用于邻接接合的材料的特定材料来控制底层界面和上覆界面中的界面相互作用来调节相邻金属氧化物中的载流子密度。 该方法还包括一个或两个步骤,通过对形成下面界面的组分的下层材料进行表面处理来控制底层界面中的相互作用,并通过在将材料沉积在第一层之前进行的金属氧化物膜的表面处理来控制上覆界面中的相互作用 金属氧化物层。

    DOUBLE SELF-ALIGNED METAL OXIDE TFT
    5.
    发明公开
    DOUBLE SELF-ALIGNED METAL OXIDE TFT 审中-公开
    DUAL自对准TFT METAL

    公开(公告)号:EP2812907A1

    公开(公告)日:2014-12-17

    申请号:EP13746554.8

    申请日:2013-02-06

    申请人: CBrite Inc.

    IPC分类号: H01J1/62

    摘要: A method of fabricating metal oxide TFTs on transparent substrates includes the steps of positioning an opaque gate metal area on the front surface of the substrate, depositing transparent gate dielectric and transparent metal oxide semiconductor layers overlying the gate metal and a surrounding area, depositing transparent passivation material on the semiconductor material, depositing photoresist on the passivation material, exposing and developing the photoresist to remove exposed portions, etching the passivation material to leave a passivation area defining a channel area, depositing transparent conductive material over the passivation area, depositing photoresist over the conductive material, exposing and developing the photoresist to remove unexposed portions, and etching the conductive material to leave source and drain areas on opposed sides of the channel area.

    PIXELATED IMAGER WITH MOTFET AND PROCESS
    6.
    发明公开
    PIXELATED IMAGER WITH MOTFET AND PROCESS 有权
    PIXELBILDGEBER MIT MOTFET UND VERFAHREN

    公开(公告)号:EP2932534A4

    公开(公告)日:2016-08-10

    申请号:EP13863613

    申请日:2013-12-09

    申请人: CBRITE INC

    IPC分类号: H01L31/036 H01L27/146

    摘要: A method of fabricating a pixelated imager includes providing a substrate with bottom contact layer and sensing element blanket layers on the contact layer. The blanket layers are separated into an array of sensing elements by trenches isolating adjacent sensing elements. A sensing element electrode is formed adjacent each sensing element overlying a trench and defining a TFT. A layer of metal oxide semiconductor (MOS) material is formed on a dielectric layer overlying the electrodes and on an exposed upper surface of the blanket layers defining the sensing element adjacent each TFT. A layer of metal is deposited on each TFT and separated into source/drain electrodes on opposite sides of the sensing element electrode. The metal forming one of the S/D electrodes contacts the MOS material overlying the exposed surface of the semiconductor layer, whereby each sensing element in the array is electrically connected to the adjacent TFT by the MOS material.

    摘要翻译: 制造像素化成像器的方法包括在接触层上提供底层接触层和感测元件覆盖层。 橡皮布层通过隔离相邻感测元件的沟槽分离成感测元件的阵列。 感测元件电极邻近覆盖沟槽的每个感测元件形成并且限定TFT。 一层金属氧化物半导体(MOS)材料形成在覆盖电极的电介质层上,并且在覆盖层的暴露的上表面上形成与每个TFT相邻的感测元件。 在每个TFT上沉积一层金属,并在传感元件电极的相对侧分离成源极/漏极。 形成S / D电极之一的金属接触覆盖半导体层的暴露表面的MOS材料,由此阵列中的每个感测元件通过MOS材料电连接到相邻的TFT。

    AMOLED WITH CASCADED OLED STRUCTURES
    10.
    发明公开
    AMOLED WITH CASCADED OLED STRUCTURES 审中-公开
    AMOLED具有级联OLED结构

    公开(公告)号:EP2467884A1

    公开(公告)日:2012-06-27

    申请号:EP10810340.9

    申请日:2010-07-19

    申请人: CBrite Inc.

    IPC分类号: H01L51/50

    摘要: An active matrix organic light emitting display includes a plurality of pixels with each pixel including at least one organic light emitting diode circuit. Each diode circuit producing a predetermined amount of light Im in response to power W applied to the circuit and including n organic light emitting diodes cascaded in series so as to increase voltage dropped across the cascaded diodes by the factor of n, where n is an integer greater than one. Each diode of the n organic light emitting diodes produces approximately 1/n of the predetermined amount of light Im so as to reduce current flowing in the diodes by 1/n. The organic light emitting diode circuit of each pixel includes a thin film transistor current driver with the cascaded diodes connected in the source/drain circuit so the current driver provides the current flowing in the diodes.