COMPOSITE SUBSTRATE
    2.
    发明授权
    COMPOSITE SUBSTRATE 有权
    复合材料基材

    公开(公告)号:EP2822026B1

    公开(公告)日:2018-03-14

    申请号:EP13754726.1

    申请日:2013-02-28

    发明人: KITADA, Masanobu

    摘要: Provided is a composite substrate having a semiconductor layer wherein diffusion of a metal is suppressed. This composite substrate has: a single crystal supporting substrate composed of an insulating oxide; a semiconductor layer, which has one main surface overlapping the supporting substrate, and which is composed of a single crystal; and a polycrystalline or amorphous intermediate layer, which is positioned between the supporting substrate and the semiconductor layer, and which has, as a main component, an element constituting the supporting substrate or an element constituting the semiconductor layer, and in which the ratio of accessory components other than the main component is less than 1 mass %.

    SELF-ALIGNED METAL OXIDE TFT
    4.
    发明公开
    SELF-ALIGNED METAL OXIDE TFT 审中-公开
    SELBSTAUSGERICHTETER METALLOXID-TFT

    公开(公告)号:EP3066692A4

    公开(公告)日:2017-06-28

    申请号:EP14859754

    申请日:2014-11-05

    申请人: CBRITE INC

    摘要: A method of fabricating MOTFTs includes positioning opaque gate metal on a transparent substrate, depositing gate dielectric material overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material thereon. Etch stop material is deposited on the semiconductor material. Photoresist defines an isolation area in the semiconductor material. Exposing the photoresist from the rear surface of the substrate and removing exposed portions to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material to form source and drain areas.

    摘要翻译: 制造MOTFT的方法包括将不透明栅极金属设置在透明衬底上,沉积覆盖栅极金属和周围区域的栅极介电材料,并在其上沉积金属氧化物半导体材料。 蚀刻停止材料沉积在半导体材料上。 光致抗蚀剂定义了半导体材料中的隔离区。 从衬底的后表面暴露光致抗蚀剂并去除暴露部分,除了覆盖并与栅极金属对齐的部分之外,未暴露蚀刻停止材料。 蚀刻半导体材料的未覆盖部分以隔离TFT。 使用光致抗蚀剂,选择性地蚀刻蚀刻停止层以留下覆盖并与栅极金属对准的部分,并在半导体材料中限定沟道区域。 沉积并图案化导电材料以形成源极和漏极区域。

    ORGANIC LIGHT-EMITTING DIODE DISPLAY WITH BOTTOM SHIELDS
    5.
    发明公开
    ORGANIC LIGHT-EMITTING DIODE DISPLAY WITH BOTTOM SHIELDS 审中-公开
    ANZEIGE麻省理工学院ORICHANISCHEN LICHTEMITTIERENDEN DIODEN MIT UNTEREN ABSCHIRMUNGEN

    公开(公告)号:EP3097594A4

    公开(公告)日:2017-06-07

    申请号:EP14879712

    申请日:2014-09-23

    申请人: APPLE INC

    摘要: A display may have an array of organic light-emitting diode display pixels. Each display pixel may have a light-emitting diode that emits light under control of a drive transistor. Each display pixel may also have control transistors for compensating and programming operations. The array of display pixels may have rows and columns. Row lines may be used to apply row control signals to rows of the display pixels. Column lines (data lines) may be used to apply display data and other signals to respective columns of display pixels. A bottom conductive shielding structure may be formed below each drive transistor. The bottom conductive shielding structure may serve to shield the drive transistor from any electric field generated from the adjacent row and column lines. The bottom conductive shielding structure may be electrically floating or coupled to a power supply line.

    摘要翻译: 显示器可以具有一组有机发光二极管显示像素。 每个显示像素可以具有在驱动晶体管的控制下发光的发光二极管。 每个显示像素还可以具有用于补偿和编程操作的控制晶体管。 显示像素的阵列可以具有行和列。 行线可用于将行控制信号施加到显示像素的行。 列线(数据线)可以用于将显示数据和其他信号应用于各列显示像素。 底部导电屏蔽结构可以形成在每个驱动晶体管的下方。 底部导电屏蔽结构可用于屏蔽驱动晶体管免受由相邻行和列线产生的任何电场的影响。 底部导电屏蔽结构可以是电浮动的或耦合到电源线。

    ARRAY SUBSTRATE, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING ARRAY SUBSTRATE
    6.
    发明公开
    ARRAY SUBSTRATE, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING ARRAY SUBSTRATE 有权
    ARRAYSUBSTRAT,ANZEIGEVORRICHTUNG UND VERFAHREN ZUR HERSTELLUNG ARRAYSUBSTRATS

    公开(公告)号:EP3018704A4

    公开(公告)日:2017-02-15

    申请号:EP13861521

    申请日:2013-12-03

    摘要: An array substrate, a display device and a method of producing the array substrate are provided, and the array substrate comprises a substrate (101) and a thin film field effect transistor and a data line (107) formed on the substrate (101), and the thin film field effect transistor comprises a gate electrode (102), an active layer (105), a source electrode (1082) and a drain electrode (1081), a gate insulating layer (104) is formed between the gate electrode (102) and the active layer (105), and the array substrate comprises: a protection layer (112) formed between the gate insulating layer (104) and the data line (107) and being in direct contact with the data line (107); and the protection layer (112) is provided on the same layer with and has the same material with the active layer (105).

    摘要翻译: 提供阵列基板,显示装置和阵列基板的制造方法,阵列基板包括基板(101)和薄膜场效应晶体管以及形成在基板(101)上的数据线(107) 所述薄膜场效应晶体管包括栅电极(102),有源层(105),源电极(1082)和漏电极(1081),在所述栅电极 102)和有源层(105),阵列基板包括:形成在栅极绝缘层(104)和数据线(107)之间并与数据线(107)直接接触的保护层(112) ; 并且所述保护层(112)设置在与所述有源层(105)相同的层上并具有相同的材料。

    THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
    8.
    发明公开
    THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    薄膜晶体管衬底及其制造方法

    公开(公告)号:EP3038159A3

    公开(公告)日:2016-10-05

    申请号:EP15197918.4

    申请日:2015-12-04

    IPC分类号: H01L29/66 H01L29/786

    摘要: A thin film transistor substrate includes a gate electrode disposed on a base substrate, an active pattern overlapping the gate electrode, a source metal pattern comprising both a source electrode disposed on the active pattern and a drain electrode spaced apart from the source electrode, a buffer layer disposed on the source metal pattern and contacting the active pattern, a first passivation layer disposed on the buffer layer and a second passivation layer disposed on the first passivation layer. The density of hydrogen in the buffer layer is greater than the density of hydrogen in the first passivation layer and less than the density of hydrogen in the second passivation layer.

    摘要翻译: 薄膜晶体管基板包括设置在基底基板上的栅电极,与栅电极重叠的有源图案,包括设置在有源图案上的源电极和与源电极分隔开的漏电极的源金属图案,缓冲器 设置在源极金属图案上并与有源图案接触的第一钝化层,设置在缓冲层上的第一钝化层和设置在第一钝化层上的第二钝化层。 缓冲层中氢的密度大于第一钝化层中氢的密度并小于第二钝化层中氢的密度。

    Manufacturing method of semiconductor device
    10.
    发明授权
    Manufacturing method of semiconductor device 有权
    半导体器件的制造方法

    公开(公告)号:EP2423954B1

    公开(公告)日:2016-04-27

    申请号:EP11178637.2

    申请日:2011-08-24

    发明人: Yamazaki, Shunpei

    摘要: One object is to have stable electrical characteristics and high reliability and to manufacture a semiconductor device including a semi-conductive oxide film. Film formation is performed by a sputtering method using a target in which gallium oxide is added to a material that is easy to volatilize compared to gallium when the material is heated at 400 °C to 700 °C like zinc, and a formed film is heated at 400 °C to 700 °C, whereby the added material is segregated in the vicinity of a surface of the film and the oxide is crystallized. Further, a semi-conductive oxide film is deposited thereover, whereby a semi-conductive oxide having a crystal which succeeds a crystal structure of the oxide that is crystallized by heat treatment is formed.

    摘要翻译: 一个目的是具有稳定的电特性和高可靠性,并且制造包括半导体氧化膜的半导体器件。 当将材料在如400℃至700℃像锌一样加热时,使用其中加入氧化镓的靶与溅射容易挥发的材料相比,通过溅射法进行成膜,并且将成膜加热 在400℃〜700℃下,由于添加的材料在膜的表面附近分离,氧化物结晶化。 此外,在其上沉积半导电氧化物膜,由此形成具有通过热处理结晶化的氧化物晶体结构成为结晶的半导体氧化物。