公开(公告)号：EP3183661B1

公开(公告)日：2018-09-26

申请号：EP15757065.6

申请日：2015-08-13

申请人： Qualcomm Incorporated

发明人： CHUN, Dexter Tamio ,  CHITTULURI, Suryanarayana China ,  LI, Yanru

IPC分类号： G06F13/16 ,  G06F12/06

CPC分类号： G06F3/0607 ,  G06F3/0631 ,  G06F3/0665 ,  G06F3/0683 ,  G06F12/0246 ,  G06F12/06 ,  G06F12/10 ,  G06F13/1684 ,  G06F2212/1048 ,  G06F2212/152 ,  G06F2212/171 ,  G06F2212/206 ,  G06F2212/214 ,  G06F2212/261 ,  G06F2212/654 ,  G06F2212/7201

摘要： Systems and methods are disclosed for expanding memory for a system on chip (SoC). A memory card is loaded in an expandable memory socket electrically and is coupled to a system on chip (SoC) via an expansion bus. The memory card comprises a first volatile memory device. In response to detecting the memory card, an expanded virtual memory map is configured. The expanded virtual memory map comprises a first virtual memory space associated the first volatile memory device and a second virtual memory space associated with a second volatile memory device electrically coupled to the SoC via a memory bus. One or more peripheral images associated with the second virtual memory space are relocated to a first portion of the first virtual memory space. A second portion of the first virtual memory space is configured as a block device for performing swap operations associated with the second virtual memory space.

公开(公告)号：EP3295316A1

公开(公告)日：2018-03-21

申请号：EP16725679

申请日：2016-05-11

申请人： XILINX INC

发明人： BIELICH LUIS E ,  NERTNEY ROBERT E

IPC分类号： G06F12/08 ,  G06F9/50 ,  G06F11/10 ,  G06F12/02 ,  G06F12/06 ,  G06F12/10 ,  G06F13/16 ,  G06F21/79 ,  H03K19/00 ,  H03K19/177

CPC分类号： H03K19/1776 ,  G06F9/5016 ,  G06F11/1064 ,  G06F12/0292 ,  G06F12/0615 ,  G06F12/0811 ,  G06F12/084 ,  G06F12/0864 ,  G06F12/0888 ,  G06F12/0897 ,  G06F12/10 ,  G06F12/126 ,  G06F13/1694 ,  G06F21/79 ,  G06F2212/1044 ,  G06F2212/206 ,  G06F2212/2515 ,  G06F2212/6042 ,  H03K19/0008

摘要： An approach for management of memory in a programmable integrated circuit (IC) includes configuring a memory map of the programmable IC with an association of a first subset of addresses of memory address space of the programmable IC and physical memory of the programmable IC. The memory map is further configured with an association of a second subset of addresses of the memory address space and a virtual memory block. At least a portion of a cache memory of the programmable IC is locked to the second subset of addresses.

公开(公告)号：EP2862086A4

公开(公告)日：2016-03-02

申请号：EP13803882

申请日：2013-06-03

申请人： CARINGO INC

发明人： CARPENTIER PAUL R M ,  TURPIN RUSSELL

IPC分类号： G06F12/02 ,  G06F3/06 ,  G06F11/07 ,  G06F11/20 ,  G06F12/10

CPC分类号： G06F11/0709 ,  G06F3/0604 ,  G06F3/0607 ,  G06F3/061 ,  G06F3/0613 ,  G06F3/0626 ,  G06F3/0635 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0667 ,  G06F3/067 ,  G06F3/0683 ,  G06F11/2084 ,  G06F12/1009 ,  G06F2212/206 ,  H04L45/745 ,  H04L67/1097

摘要： Digital objects are stored and accessed within a fixed content storage cluster by using a page mapping table and a pages index. A stream is read from the cluster by using a portion of its unique identifier as a key into the page mapping table. The page mapping table indicates a node holding a pages index indicating where the stream is stored. A stream is written to the cluster by storing the stream on any suitable node and then updating a pages index stored within the cluster. The cluster recovers from a node failure by first replicating streams from the failed node and reallocating a page mapping table to create a new pages index. The remaining nodes send records of the unique identifiers corresponding to objects they hold to the new pages index. A node is added to the cluster by reallocating a page mapping table.

公开(公告)号：EP1532533B1

公开(公告)日：2008-12-31

申请号：EP03765858.0

申请日：2003-07-17

申请人： Intel Corporation

发明人： SMITH, David ,  BISSESSUR, Sailesh

IPC分类号： G06F12/02

CPC分类号： G06F12/0292 ,  G06F2212/206

摘要： Provided are a method, system, and program for a local bus system. A memory address space in configured to control an I/O device. The memory address space is associated with a port coupled to the local bus system.

公开(公告)号：EP0568078B1

公开(公告)日：1997-08-06

申请号：EP93106998.3

申请日：1993-04-29

申请人： TOSHIBA AMERICA INFORMATION SYSTEMS, INC. ,  KABUSHIKI KAISHA TOSHIBA

发明人： Matsumoto, John F., c/o Intellectual Property Div. ,  Ando, Motoaki, c/o Intellectual Property Div.

IPC分类号： G09G1/16 ,  G06F15/00

CPC分类号： G09G5/363 ,  G06F3/14 ,  G06F12/1027 ,  G06F12/1081 ,  G06F13/362 ,  G06F2212/206 ,  G09G5/001 ,  G09G5/06 ,  G09G5/08 ,  G09G5/39 ,  G09G5/42 ,  G09G2340/12

公开(公告)号：EP0492859A2

公开(公告)日：1992-07-01

申请号：EP91311324.7

申请日：1991-12-05

申请人： SUN MICROSYSTEMS, INC.

发明人： Becker, Robert ,  Mehring, Peter

IPC分类号： G06F12/10

CPC分类号： G06F12/1027 ,  G06F12/1081 ,  G06F2212/206

摘要： A translation lookaside buffer for use with a virtual memory system with at least a first and a second level of lookup tables including apparatus for storing virtual addresses, apparatus for storing a physical address associated with each of the virtual addresses, some of the physical addresses indicating pages in which the information sought by the virtual address resides, and others of the physical addresses indicating pages in which the physical address of information sought by the virtual address resides.

摘要翻译： 一种用于具有至少第一和第二级查找表的虚拟存储器系统的翻译后备缓冲器，包括用于存储虚拟地址的装置，用于存储与每个虚拟地址相关联的物理地址的装置，一些物理地址指示 虚拟地址所寻求的信息所在的页面，以及指示虚拟地址所寻求的信息的物理地址所在的页面的其他物理地址。

公开(公告)号：EP0304469A4

公开(公告)日：1990-09-26

申请号：EP88902726

申请日：1988-02-29

申请人： TANDON CORPORATION

发明人： FAIRMAN, BRUCE, ALAN ,  LARSEN, ALLEN, JOHN ,  SWENTON, WILLIAM, GERARD ,  TAYLOR, ROBERT, GRAMPS, JR.

IPC分类号： G06F12/06 ,  G06F12/02 ,  G06F12/10 ,  G06F13/28 ,  G06F13/32 ,  G06F12/00 ,  G06F13/00

CPC分类号： G06F13/32 ,  G06F12/0292 ,  G06F12/1081 ,  G06F2212/206

公开(公告)号：EP2396728B1

公开(公告)日：2014-07-23

申请号：EP10700774.2

申请日：2010-01-08

申请人： SanDisk IL Ltd.

发明人： BRYANT-RICH, Donald, Ray

IPC分类号： G06F12/02 ,  G06F12/06

CPC分类号： G06F12/06 ,  G06F12/0223 ,  G06F2212/206

公开(公告)号：EP2426607A2

公开(公告)日：2012-03-07

申请号：EP11187453.3

申请日：2010-01-08

申请人： SanDisk IL Ltd.

发明人： Bryant-Rich, Donald Ray

IPC分类号： G06F12/02 ,  G06F12/06

CPC分类号： G06F12/06 ,  G06F12/0223 ,  G06F2212/206

摘要： Systems and methods for reading data are disclosed. In a particular embodiment, a data storage device includes a host interface that is adapted to couple the data storage device to a host. The host includes memory that is addressable by a host memory address space. The data storage device also includes a device address space that is independent from the host memory address space. The device address space includes a first address region and a second address region, where the second address region is distinct from the first address region. The data storage device also includes a non-volatile memory array and a controller coupled to the non-volatile memory array and further coupled to a mapped device.; The controller is adapted to, in response to a first request from the host for access to the first address region of the device address space, perform a memory access operation at the non- volatile memory array. The controller is also adapted to, in response to a second request from the host for access to the second address region of the device address space, map the second request to the mapped device.

摘要翻译： 公开了用于读取数据的系统和方法。 在特定实施例中，数据存储设备包括适于将数据存储设备耦合到主机的主机接口。 主机包括可由主机内存地址空间寻址的内存。 数据存储设备还包括独立于主机存储器地址空间的设备地址空间。 设备地址空间包括第一地址区域和第二地址区域，其中第二地址区域与第一地址区域不同。 数据存储设备还包括非易失性存储器阵列和耦合到非易失性存储器阵列并进一步耦合到映射器件的控制器; 控制器适于响应于来自主机的用于访问设备地址空间的第一地址区域的第一请求，在非易失性存储器阵列处执行存储器访问操作。 控制器还适于响应于来自主机的用于访问设备地址空间的第二地址区域的第二请求，将第二请求映射到映射的设备。

公开(公告)号：EP1449087A4

公开(公告)日：2006-04-19

申请号：EP02761669

申请日：2002-09-13

申请人： SRC COMPUTERS INC

发明人： BURTON LEE

IPC分类号： G06F12/00 ,  G06F12/04 ,  G06F12/08

CPC分类号： G06F12/0888 ,  G06F12/04 ,  G06F12/0879 ,  G06F12/0886 ,  G06F2212/206

摘要： A system and method for enhancing the utilization of available bandwidth for an uncached device (12O-12N). Data written to the device is done so by striding the available data into multiple data elements of the appropriate size for the uncached device (12O-12N). Data read from the device is retrieved from multiple addresses on the uncached device (12O-12N) to avoid unnecessary waits cycles in the processor device (10O-10N).