摘要:
A processing apparatus (600) for managing power based on data, the processing apparatus (600) adapted to obtain, in response to an access request from a processor (610) for particular data stored in a memory (630), existing power information having a predefined correspondence to the particular data and control a power mode of the processor (610) based on the existing power information.
摘要:
Technologies are generally described herein for supporting program and data annotation for hardware customization and energy optimization. A code block to be annotated may be examined and a hardware customization may be determined to support a specified quality of service level for executing the code block with reduced energy expenditure. Annotations may be determined as associated with the determined hardware customization. An annotation may be provided to indicate using the hardware customization while executing the code block. Examining the code block may include one or more of performing a symbolic analysis, performing an empirical observation of an execution of the code block, performing a statistical analysis, or any combination thereof. A data block to be annotated may also be examined. One or more additional annotations to be associated with the data block may be determined.
摘要:
Power consumption can be suppressed while maintaining an appropriate execution speed. The information processor (1) has an interpreter for interpreting a source program or intermediate language program and a run-time translator for translating the program into a machine language program native to the computer. The information processor (1) comprises a power-saving request monitor (126) for monitoring whether or not there is a power-saving request from an input interface or a predetermined power-saving request in a given memory, and a power-saving translation controller (129). The power-saving request makes a request for suppression of the power consumed by the processor (1). The power-saving translation controller (129) makes a decision as to whether the run-time translator executes run-time translation of the program according to whether there is the power-saving request. Based on the result of the decision, the translation controller instructs the run-time translator to execute the run-time translation.
摘要:
Provided is an apparatus and method for managing power based on data. The apparatus may include a code segment searching unit configured to search for at least one code segment in which a power type is inserted, a block determining unit configured to determine at least one block based on the at least one found code segment, and a power mode control unit configured to control the at least one determined block to operate in a power mode corresponding to the power type.
摘要:
Provided is an apparatus and method for managing power based on data. The apparatus may include a code segment searching unit configured to search for at least one code segment in which a power type is inserted, a block determining unit configured to determine at least one block based on the at least one found code segment, and a power mode control unit configured to control the at least one determined block to operate in a power mode corresponding to the power type.
摘要:
A coprocessor executing one among a set of candidate kernel loops within an application operates at the minimal clock frequency satisfying schedule constraints imposed by the compiler and data bandwidth constraints. The optimal clock frequency is statically determined by the compiler and enforced at runtime by software-controlled clock circuitry. Power dissipation savings and optimal resource usage are therefore achieved by the adaptation at runtime of the coprocessor clock rate for each of the various kernel loop implementations.
摘要:
The present invention provides a compile or pre-compile method and a device for converting first program code into second program code, such that the second program code has an improved execution on a targeted programmable platform. The method according to embodiments of the present invention comprises grouping operations on data for joint execution on a functional unit of the targeted platform, scheduling operations on data in time, and assigning operations to an appropriate functional unit of the targeted platform, wherein detailed word length information is used in at least one of the grouping, scheduling or assigning operations, rather than the typically used approximations like powers of two.
摘要:
Technologies are generally described herein for supporting program and data annotation for hardware customization and energy optimization. A code block to be annotated may be examined and a hardware customization may be determined to support a specified quality of service level for executing the code block with reduced energy expenditure. Annotations may be determined as associated with the determined hardware customization. An annotation may be provided to indicate using the hardware customization while executing the code block. Examining the code block may include one or more of performing a symbolic analysis, performing an empirical observation of an execution of the code block, performing a statistical analysis, or any combination thereof. A data block to be annotated may also be examined. One or more additional annotations to be associated with the data block may be determined.
摘要:
When parallel processing is performed by a system configured by a plurality of processors and a multicore processor chip, power control code can be reduced by dynamically changing the number of processors for performing the parallel processing and an operation clock of each processor. A translation device includes: a parallel loop processing detection unit configured to detect from the source code a loop processing code for execution of an internal processing operation for a given number of repeating times, and an independent parallel loop processing code in the internal processing operation performed for each repetition to be concurrently processed; and a dynamic parallel conversion unit configured to generate a control core code for control of the number of repeating times in the parallel loop processing code and a parallel processing code for changing the number of repeating times corresponding to the control from the control core code. The technology also relates to a translating method, a translating program, a control method for a processor core, and a processor.
摘要:
Methods, apparatus and software products are described for design-time data-assignment techniques for hierarchical memories, e.g., multi-banked memories in an essentially digital system as well as methods, apparatus and software products for run-time memory management techniques of such a system. Memory assignment techniques are described for assigning data to a hierarchical memory particularly for multi-tasked applications where data of dynamically created/deleted tasks is allocated at run-time. The energy consumption of hierarchical memories such as multi-banked memories depends largely on how data is assigned to the memory banks. Methods, apparatus and software products are described for design-time data-assignment techniques for hierarchical memories, e.g., multi-banked memories in an essentially digital system which improve a cost function such as energy consumption.