公开(公告)号：EP3267298A1

公开(公告)日：2018-01-10

申请号：EP17758788.8

申请日：2017-03-31

申请人： Shenzhen Goodix Technology Co., Ltd.

发明人： YANG, Fu-Chiang ,  WEN, Ya-Nan ,  LIANG, Yingsi

IPC分类号： G06F3/044

CPC分类号： H03H19/004 ,  G06F3/0416 ,  G06F3/0418 ,  G06F3/044 ,  G06F17/12 ,  H03D7/14 ,  H03D2200/0086 ,  H03F3/45475 ,  H03F2200/264 ,  H03F2203/45526 ,  H03F2203/45594 ,  H03F2203/45616 ,  H03H7/38 ,  H03H11/126 ,  H03H2210/028 ,  H03H2210/036 ,  H03K5/02 ,  H03K5/1252

摘要： The present application provides a window function processing module including an integrating circuit, configured to receive an integrating input signal, the integrating circuit comprising an operational amplifier; an integrating capacitor, coupled to an output terminal and a first input terminal of the operational amplifier; and an adjustable impedance module, coupled between the first input terminal of the operational amplifier and an integrating input terminal of the integrating circuit, wherein the adjustable impedance module is controlled by at least one control signal to adjust an impedance value of the adjustable impedance module; and a control unit, coupled to the integrating circuit, configured to generate the at least one control signal according to a window function, to adjust the integration gain of the integrating circuit, such that the integrating output signal is related to an operation result of the integrating input signal and the window function.

摘要翻译： 本申请提供一种窗函数处理模块，包括：积分电路，用于接收积分输入信号，所述积分电路包括运算放大器; 积分电容器，耦合到运算放大器的输出端和第一输入端; 以及可调阻抗模块，耦接于所述运算放大器的所述第一输入端与所述积分电路的积分输入端之间，其中所述可调阻抗模块由至少一个控制信号控制以调整所述可调阻抗模块的阻抗值; 以及一控制单元，耦接该积分电路，用以依据一窗口函数产生该至少一控制信号，以调整该积分电路的积分增益，以使该积分输出信号与该积分电路的运算结果相关 集成输入信号和窗口功能。

公开(公告)号：EP3252581A1

公开(公告)日：2017-12-06

申请号：EP16889664.5

申请日：2016-04-01

申请人： Shenzhen Goodix Technology Co., Ltd.

发明人： YANG, Fuchiang ,  WEN, Yanan ,  LIANG, Yingsi

IPC分类号： G06F3/044

CPC分类号： H03H19/004 ,  G06F3/0416 ,  G06F3/0418 ,  G06F3/044 ,  G06F17/12 ,  H03D7/14 ,  H03D2200/0086 ,  H03F3/45475 ,  H03F2200/264 ,  H03F2203/45526 ,  H03F2203/45594 ,  H03F2203/45616 ,  H03H7/38 ,  H03H11/126 ,  H03H2210/028 ,  H03H2210/036 ,  H03K5/02 ,  H03K5/1252

摘要： The present invention provides an integrating circuit and a signal processing module. The integrating circuit comprises an operational amplifier; an integrating capacitor, coupled to an output terminal and a first input terminal of the operational amplifier; and an adjustable resistance module, coupled between the first input terminal of the operational amplifier and an integrating input terminal of the integrating circuit. The adjustable resistance module receives a plurality of first control signals, to adjust a resistance value of the adjustable resistance module. The present invention may realize the noise brought by sidelobe to enhance the SNR, and reduce the power consumption and complexity of the overall circuit.

摘要翻译： 本发明提供一种积分电路和信号处理模块。 积分电路包括运算放大器; 积分电容器，耦合到运算放大器的输出端和第一输入端; 以及可调电阻模块，耦接于运算放大器的第一输入端与积分电路的积分输入端之间。 可调电阻模块接收多个第一控制信号，以调整可调电阻模块的电阻值。 本发明可以实现旁瓣带来的噪声，提高信噪比，降低整个电路的功耗和复杂度。

公开(公告)号：EP3145079A1

公开(公告)日：2017-03-22

申请号：EP16188820.1

申请日：2016-09-14

申请人： MediaTek Inc.

发明人： CHANG, Wen-Hua

IPC分类号： H03F1/08 ,  H03F1/30 ,  H03F3/00 ,  H03F3/45

CPC分类号： H03F3/45686 ,  H03F1/083 ,  H03F1/30 ,  H03F3/005 ,  H03F3/45 ,  H03F3/45273 ,  H03F2200/151 ,  H03F2200/153 ,  H03F2200/159 ,  H03F2200/42 ,  H03F2200/75 ,  H03F2203/45012 ,  H03F2203/45061 ,  H03F2203/45156 ,  H03F2203/45221 ,  H03F2203/45244 ,  H03F2203/45514 ,  H03F2203/45546 ,  H03F2203/45551 ,  H03F2203/45616 ,  H03H7/004

摘要： A switched-capacitor circuit comprising a differential operational amplifier (206) and a feedback circuit (204A, 204B) is described. In some embodiments, the feedback circuit (204A, 204B) may be configured to provide a reference voltage (Vr1, Vr2) that is insensitive to temperature and/or process variations. In some embodiments, the feedback circuit may be configured to mitigate the time delay associated with one or more capacitors (Cs1, Cs2) of the switched-capacitor circuit. The switched-capacitor circuit may be controlled by a pair of control signals. During a first phase, one or more capacitors (Cs1, Cs2) may be charged, or discharged, through an input signal (Vi+, Vi-). During a second phase, the electric charge of the one or more capacitors (Cs1, Cs2) may be retained.

摘要翻译： 描述了包括差分运算放大器（206）和反馈电路（204A，204B）的开关电容器电路。 在一些实施例中，反馈电路（204A，204B）可以被配置为提供对温度和/或过程变化不敏感的参考电压（Vr1，Vr2）。 在一些实施例中，反馈电路可以被配置为减轻与开关电容器电路的一个或多个电容器（Cs1，Cs2）相关联的时间延迟。 开关电容器电路可以由一对控制信号控制。 在第一阶段期间，可以通过输入信号（Vi +，Vi-）对一个或多个电容器（Cs1，Cs2）进行充电或放电。 在第二阶段期间，可以保持一个或多个电容器（Cs1，Cs2）的电荷。

公开(公告)号：EP3079161A1

公开(公告)日：2016-10-12

申请号：EP16164482.8

申请日：2016-04-08

申请人： Renesas Electronics Corporation

发明人： KONDO, Satoshi ,  KUBO, Kazuaki ,  ITANO, Noriyuki

IPC分类号： H01F7/18 ,  H01F7/06

CPC分类号： H01F7/064 ,  H01F7/1844 ,  H01F2007/1866 ,  H01F2007/1888 ,  H03F3/45475 ,  H03F2203/45588 ,  H03F2203/45594 ,  H03F2203/45616

摘要： An output driving circuit outputs an output current to a solenoid incorporated in a vehicle through an output terminal. A detection resistor connected between the output terminal and the output driving circuit. An amplification unit configured to output an analog detection signal generated by amplifying a voltage between both ends of the detection resistor. A current generation circuit configured to output a reference current. A reference resistor connected between the current generation circuit and a ground and configured to output a reference voltage according to the reference current. An A/D converter configured to convert the analog detection signal into a digital detection signal using the reference voltage as a reference. A control circuit configured to control the output current output from the output driving circuit according to the digital detection signal.

摘要翻译： 输出驱动电路通过输出端子将输出电流输出到并入车辆的螺线管。 连接在输出端和输出驱动电路之间的检测电阻。 放大单元，被配置为输出通过放大检测电阻器两端之间的电压而产生的模拟检测信号。 配置为输出参考电流的电流产生电路。 连接在电流产生电路和地之间并被配置为根据参考电流输出参考电压的参考电阻。 A / D转换器，被配置为使用参考电压作为参考将模拟检测信号转换成数字检测信号。 控制电路，被配置为根据数字检测信号来控制从输出驱动电路输出的输出电流。

公开(公告)号：EP1864553B1

公开(公告)日：2015-08-26

申请号：EP05726151.3

申请日：2005-03-29

申请人： Linear Technology Corporation

发明人： VITUNIC, Mark Robert ,  HENDERSON, Edward Lloyd

IPC分类号： H05B33/08 ,  G05F1/56 ,  H03F3/45 ,  H03F1/30

CPC分类号： H03F3/45605 ,  H03F2203/45212 ,  H03F2203/45616

公开(公告)号：EP2430749A1

公开(公告)日：2012-03-21

申请号：EP10721220.1

申请日：2010-05-13

申请人： QUALCOMM Incorporated

发明人： CASSIA, Marco ,  TASIC, Aleksandar M.

IPC分类号： H03F3/21 ,  H03F3/45 ,  H03F3/72 ,  H03F3/19 ,  H03G1/00

CPC分类号： H03F3/72 ,  H03F3/19 ,  H03F3/211 ,  H03F3/45183 ,  H03F2200/111 ,  H03F2200/294 ,  H03F2200/429 ,  H03F2200/451 ,  H03F2203/21136 ,  H03F2203/21178 ,  H03F2203/45318 ,  H03F2203/45352 ,  H03F2203/45616 ,  H03F2203/45702 ,  H03F2203/7209 ,  H03F2203/7215 ,  H03F2203/7236 ,  H03F2203/7239

摘要： Techniques for designing a switchable amplifier are described. In one aspect, a switchable amplifier including a core amplifier circuit configured to selectively enable one or more parallel input transistor pairs is described. The core amplifier circuit comprises a permanently enabled input transistor pair. In another aspect, a device operable between a first mode of operation and a second mode of operation comprising a receiver logic circuit for selectably enabling and disabling a plurality of input transistor pairs within a switchable amplifier is described where the switchable amplifier also includes a core amplifier circuit coupled to the receiver logic circuit for selectably enabling and disabling a transistor pair therein. The described switchable amplifiers result in the ability to provide varying amplifier performance characteristics based upon the current mode of operation of the device.

公开(公告)号：EP2266202A4

公开(公告)日：2012-02-29

申请号：EP09720874

申请日：2009-03-09

申请人： EXAR CORP ,  RANDLETT RICHARD W

发明人： RANDLETT RICHARD W

IPC分类号： H03F1/02 ,  H03F3/08 ,  H03F3/45

CPC分类号： H03F3/087 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45528 ,  H03F2203/45534 ,  H03F2203/45616

公开(公告)号：EP1998438A1

公开(公告)日：2008-12-03

申请号：EP08015044.4

申请日：2003-02-24

申请人： NEC Corporation

发明人： Tsuchi, Hiroshi

IPC分类号： H03F3/45 ,  H03F3/72

CPC分类号： G09G3/2011 ,  G09G3/3685 ,  G09G2310/0291 ,  H03F3/45183 ,  H03F3/72 ,  H03F2203/45506 ,  H03F2203/45616

摘要： A differential circuit and an amplifier circuit for reducing an amplitude difference deviation, performing a full-range drive, including:
a differential pair, comprising a pair of transistors, said differential pair having a non-inverting input terminal and an inverting input terminal for differentially receiving input signal voltages; and
an amplification stage, receiving an output from said differential pair and having an output terminal for outputting an output signal, said differential amplifier circuit further comprising:
a transistor connected in parallel to one of said pair of transistors composing said differential pair, said transistor having a control terminal for receiving a control voltage, said one of said pair of transistors having a control terminal connected to said non-inverting input terminal.

摘要翻译： 一种用于减小幅度差偏差的差分电路和放大器电路，执行全范围驱动，包括：包括一对晶体管的差分对，所述差分对具有非反相输入端子和反相输入端子，用于差分 接收输入信号电压; 以及放大级，接收来自所述差分对的输出并具有用于输出输出信号的输出端，所述差分放大器电路还包括：与构成所述差分对的所述一对晶体管中的一个并联连接的晶体管，所述晶体管具有 用于接收控制电压的控制端子，所述一对晶体管中的所述一个晶体管具有连接到所述非反相输入端子的控制端子。

公开(公告)号：EP1407541A2

公开(公告)日：2004-04-14

申请号：EP02782431.7

申请日：2002-06-19

申请人： Infineon Technologies AG

发明人： IRVINE, Robert-Grant ,  PRETL, Harald ,  STÖGER, Claus ,  THOMANN, Wolfgang

IPC分类号： H03F3/72

CPC分类号： H03F3/45188 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2203/45386 ,  H03F2203/45394 ,  H03F2203/45396 ,  H03F2203/45616 ,  H03F2203/7236

摘要： The invention relates to a low-noise amplifying circuit having an invertible amplification ratio. To this end, a parallel connection comprised of a first and of a second current path (3, 4) is provided between a high-frequency signal input and signal output (1, 2). The first current path (3) for amplifying signals comprises a transistor in a common base, and the second current path (4) for amplifying signals comprises a transistor in the common emitter (7) provided with an input impedance matching (25, 27). Due to the good noise characteristics and to the good linearity characteristics, the described low-noise amplifying circuit is suited for use in high-frequency receivers in which, due to a large dynamic range of the input signal, such as in the case of UMTS, an adaptive pre-amplification is still required before a frequency converter, i.e. in the high-frequency level.

公开(公告)号：EP0857372A1

公开(公告)日：1998-08-12

申请号：EP96929451.0

申请日：1996-09-06

申请人： Motorola Inc.

发明人： MACBETH, Ian

IPC分类号： H03F3

CPC分类号： H03F3/45192 ,  H03F3/45479 ,  H03F3/72 ,  H03F2203/45138 ,  H03F2203/45574 ,  H03F2203/45616 ,  H03F2203/45726

摘要： An amplifier circuit comprises a first and a second two-input differential input circuit. The first input circuit has first and second input terminals and the second input circuit has third and fourth input terminals. The first input terminal is connected to a first circuit input, the fourth input terminal is connected to a fourth circuit input. Programmable circuitry is provided for selectively connecting the second and third input terminals either to the second and third circuit inputs or to the fourth and first inputs.

摘要翻译： 放大器电路包括第一和第二双输入差分输入电路。 第一输入电路具有第一和第二输入端子，并且第二输入电路具有第三和第四输入端子。 第一输入端子连接到第一电路输入，第四输入端子连接到第四电路输入。 提供可编程电路用于选择性地将第二和第三输入端子连接到第二和第三电路输入端或第四和第一输入端。