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    A high efficiency power amplifier
    2.
    发明公开
    A high efficiency power amplifier 有权
    Leistungsverstärkermit hohem Wirkungsgrad

    公开(公告)号：EP2854288A2

    公开(公告)日：2015-04-01

    申请号：EP14191308.7

    申请日：2012-07-17

    Applicant: Ericsson Modems SA

    Inventor： Lindstrand, Jonas ,  Bryant, Carl ,  Sjöland, Henrik

    IPC: H03F1/56 ,  H03F1/52 ,  H03F3/217 ,  H03F3/24 ,  H03F3/45

    CPC classification number: H03F1/523 ,  H03F1/565 ,  H03F3/2171 ,  H03F3/245 ,  H03F3/45188 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2203/45318 ,  H03F2203/45332 ,  H03F2203/45396 ,  H03F2203/45631 ,  H03F2203/45638 ,  H03H7/38

    Abstract: A matching unit (200) configured to match a load of an amplifier circuit to an external circuit. The matching unit (200) comprises a first reactance configured to generate a first positive reactance at low frequencies and a second positive reactance at high frequencies. A second reactance unit comprises at least one series capacitor (C s ) and at least one series inductor (L s ) serially coupled between a resistor (R L ) and the first and second outputs of the amplifier. The second reactance unit is configured to generate a negative reactance at low frequencies and a third positive reactance at high frequencies; and a third reactance unit configured to generate a short at high frequencies so as to reduce a parasitic capacitance at the first and second outputs of the amplifier at high frequencies, wherein said first, second, and third reactance units are configured to operate together to provide a generally constant impedance across a wideband frequency range.

    Abstract translation: 配置单元（200），被配置为将放大器电路的负载与外部电路相匹配。 匹配单元（200）包括被配置为在低频率处产生第一正电抗的第一电抗和在高频处产生第二正电抗。 第二电抗单元包括至少一个串联电容器（C s）和串联耦合在电阻器（R L）与放大器的第一和第二输出端之间的至少一个串联电感器（L s）。 第二电抗单元被配置为在低频处产生负电抗，并在高频下产生第三正电抗; 以及第三电抗单元，其被配置为在高频下产生短路，以便降低放大器在高频下的第一和第二输出端的寄生电容，其中所述第一，第二和第三电抗单元被配置为一起操作以提供 在宽带频率范围内通常是恒定的阻抗。

    LNA HAVING A POST-DISTORTION MODE AND A HIGH-GAIN MODE
    5.
    发明授权
    LNA HAVING A POST-DISTORTION MODE AND A HIGH-GAIN MODE 有权
    LNA具有失真模式和高增益模式

    公开(公告)号：EP2248256B1

    公开(公告)日：2011-09-28

    申请号：EP09708122.8

    申请日：2009-02-06

    Applicant: QUALCOMM Incorporated

    Inventor： HOLENSTEIN, Christian ,  DENG, Junxiong ,  KIM, Namsoo

    IPC: H03F3/45 ,  H03F3/193 ,  H03F1/32 ,  H03G1/00

    CPC classification number: H03F3/193 ,  H03F1/3205 ,  H03F1/3211 ,  H03F3/45188 ,  H03F2200/294 ,  H03F2200/357 ,  H03F2200/451 ,  H03F2203/45246 ,  H03F2203/45318 ,  H03F2203/45386 ,  H03F2203/45396 ,  H03G1/0029

    Abstract: A differential low noise amplifier (LNA) is operable in a selectable one of two modes. The LNA includes a first transistor (204), a second transistor (205), a third transistor (206) and a fourth transistor. In the first mode (PDC mode), the four transistors are configured to operate as a post-distortion cancellation (PDC) LNA. The third (206) and fourth (207) transistors operate as cancel transistors that improve linearity, but reduce LNA gain somewhat. In the second mode (high gain mode), the third (206) and fourth (207) transistors are configured so that amplified versions of the LNA input signal that they output are added to amplified versions of the LNA input signal that are output by the first and second main transistors (204, 205), resulting in increased gain. Multiplexing circuits are provided within the LNA so that the LNA is configurable into a selectable one of the two modes by controlling a digital mode control signal supplied to the LNA.

    Abstract translation: 差分低噪声放大器（LNA）可在两种模式中选择一种模式下工作。 LNA包括第一晶体管（204），第二晶体管（205），第三晶体管（206）和第四晶体管。 在第一模式（PDC模式）中，四个晶体管被配置为作为失真后消除（PDC）LNA来操作。 第三（206）和第四（207）晶体管用作消除晶体管，其改善线性度，但稍微降低LNA增益。 在第二模式（高增益模式）中，第三（206）和第四（207）晶体管被配置为使得它们输出的LNA输入信号的放大版本被添加到LNA输入信号的放大版本， 第一和第二主晶体管（204,205），导致增益增加。 在LNA内提供多路复用电路，使得通过控制提供给LNA的数字模式控制信号，可将LNA配置为两种模式中的可选择的一种。

    CAPACITANCE MULTIPLIER CIRCUIT
    7.
    发明公开
    CAPACITANCE MULTIPLIER CIRCUIT 有权
    电容乘法器电路

    公开(公告)号：EP2263313A1

    公开(公告)日：2010-12-22

    申请号：EP09723336.5

    申请日：2009-03-20

    Applicant: QUALCOMM Incorporated

    Inventor： SENGUPTA, Susanta ,  BARNETT, Kenneth, Charles

    IPC: H03H11/40 ,  H03H11/48 ,  H03H11/04 ,  H03F3/08 ,  H03F3/45

    CPC classification number: H03H11/405 ,  H03F3/45183 ,  H03F3/45659 ,  H03F2200/456 ,  H03F2203/45318 ,  H03F2203/45526 ,  H03F2203/45646 ,  H03H11/0416 ,  H03H11/483

    Abstract: A capacitance multiplier circuit is configured to sense a current through a capacitor in an RC filter of the circuit and to multiply the current so as to achieve a capacitance multiplier effect without adding additional circuitry or requiring additional power. The circuit includes an RC filter, a first signal path connected to a filter output, and a second signal path connected to an input to the filter. A current output through the filter (iout) is split between the two paths, sensed in the first path and multiplied in the second path. The multiplied current is fed back from the second path to the filter input to raise the effective capacitance of capacitor C. The capacitance multiplier circuit, in raising the effective capacitance of the capacitor in the filter, does not affect the frequency response, linearity performance and/or stability of the overall circuit.

    Abstract translation: 电容倍增器电路被配置为感测通过电路的RC滤波器中的电容器的电流并且乘以电流以实现电容倍增效应而不增加额外的电路或需要额外的功率。 该电路包括RC滤波器，连接到滤波器输出的第一信号路径以及连接到滤波器的输入的第二信号路径。 通过滤波器（iout）的电流输出在两条路径之间分开，在第一路径中感测并在第二路径中倍增。 倍增电流从第二路径反馈到滤波器输入，以提高电容器C的有效电容。电容倍增器电路在提高滤波器中电容器的有效电容时不会影响频率响应，线性性能和 /或整个电路的稳定性。

    Amplifier arrangement and method for signal amplification
    9.
    发明公开
    Amplifier arrangement and method for signal amplification 有权
    Verstärkungsanordnungund Verfahren zurSignalverstärkung

    公开(公告)号：EP2109214A1

    公开(公告)日：2009-10-14

    申请号：EP08007154.1

    申请日：2008-04-10

    Applicant: Austriamicrosystems AG

    Inventor： Sharma, Vivek

    IPC: H03F1/02 ,  H03F1/08 ,  H03F3/45 ,  H03F3/72 ,  H03F3/00

    CPC classification number: H03F3/45475 ,  H03F1/0277 ,  H03F1/083 ,  H03F3/005 ,  H03F3/45179 ,  H03F3/72 ,  H03F2203/45112 ,  H03F2203/45224 ,  H03F2203/45288 ,  H03F2203/45292 ,  H03F2203/45318 ,  H03F2203/45352 ,  H03F2203/45396 ,  H03F2203/45626 ,  H03F2203/45726 ,  H03F2203/7236

    Abstract: An amplifier arrangement comprises a signal input (Iin+, Iin- ) to receive a signal to be amplified, a signal output (Out) to provide an amplified signal, an amplifier stage (AS) coupled between the signal input (Iin+, Iin-) and the signal output (Out), a switchable dynamic biasing stage (DB) with an input coupled to the signal input (Iin+, Iin-), a switchable gain boosting stage (GB) with an input coupled to the signal input (Iin+, Iin-), and a switching device (SD) coupled to the amplifier stage (AS) such that either an output of the switchable dynamic biasing stage (DB) or an output of the switchable gain boosting stage (GB) are coupled to the amplifier stage (AS). In one embodiment, by enabling the switchable dynamic biasing stage (DB) in an initial large-signal phase of amplification and the switchable gain boosting stage (GB) in a latter small-signal phase of amplification by means of the switching device (SD), high gain and low current consumption are simultaneously realised. Furthermore, a method for signal amplification is provided.

    Abstract translation: 放大器装置包括用于接收要放大的信号的信号输入（Iin +，Iin-），提供放大信号的信号输出（Out），耦合在信号输入（Iin +，Iin-）之间的放大器级（AS） 以及信号输出（Out），具有耦合到信号输入（Iin +，Iin-））的输入的可切换动态偏置级（DB），具有耦合到信号输入（Iin +，Iin-）的输入的可切换增益提升级（GB） 以及耦合到放大器级（AS）的开关器件（SD），使得可切换动态偏置级（DB）的输出或可切换增益级级（GB）的输出端耦合到放大器 舞台（AS）。 在一个实施例中，通过借助于开关装置（SD），在放大的初始大信号相位中的可切换动态偏置级（DB）和放大的后一小信号相位中的可切换增益提升级（GB） 同时实现高增益和低电流消耗。 此外，提供了一种用于信号放大的方法。

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