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20 条记录 (耗时 0.007 秒)

    A ZERO-CROSSING DETECTION CIRCUIT FOR A DIMMER CIRCUIT
    1.
    发明公开
    A ZERO-CROSSING DETECTION CIRCUIT FOR A DIMMER CIRCUIT 审中-公开
    NULLDURCHGANGSDETEKTIONSSCHALTUNGFÜREINE DIMMERSCHALTUNG

    公开(公告)号：EP3146804A1

    公开(公告)日：2017-03-29

    申请号：EP15795705.1

    申请日：2015-05-20

    申请人： Gerard Lighting Holdings Pty Ltd

    发明人： VANDERZON, James

    IPC分类号： H05B39/02 ,  H02M7/00 ,  G05F5/00

    CPC分类号： H05B33/0845 ,  G01R19/16566 ,  G01R19/1659 ,  G01R19/175 ,  H02M1/083 ,  H02M1/44 ,  H02M5/293 ,  H02M2001/0058 ,  H02M2005/2935 ,  H03K3/2893 ,  H03K3/2897 ,  H03K5/1536 ,  H05B33/0815 ,  H05B39/02 ,  H05B39/044 ,  Y02B70/1491

    摘要： A zero-crossing detection circuit for a trailing edge phase control dimmer circuit for controlling alternating current (AC) power to a load, wherein the circuit includes: a switching circuit for controlling delivery of AC power to the load by conducting power to the load in an ON state and not conducting power to the load in an OFF state; a switching control circuit for controlling turn-OFF and turn-ON of the switching circuit at each cycle of the AC; and a rectifier for rectifying the AC power in the non-conduction period to generate rectified dimmer voltage to be provided to the dimmer circuit, wherein the zero-crossing detection circuit includes a current sink circuit; wherein the current sink circuit has a low impedance at low instantaneous AC voltages; a comparator circuit configured to detect zero crossings of a first threshold value of the rectified dimmer voltage.

    摘要翻译： 一种用于向负载控制交流（AC）电力的后沿相位控制调光电路的过零检测电路，其中所述电路包括：开关电路，用于通过向所述负载施加电力来控制对所述负载的交流电力的输送 ON状态，并且在OFF状态下不对负载进行供电; 开关控制电路，用于在AC的每个周期控制开关电路的截止和导通; 以及整流器，用于在非导通时段中对AC电力进行整流，以产生要提供给调光电路的整流调光器电压，其中过零检测电路包括电流吸收电路; 其中所述电流吸收电路在低瞬时AC电压下具有低阻抗; 比较器电路，被配置为检测经整流的调光器电压的第一阈值的过零。

    Input buffer circuit
    2.
    发明公开
    Input buffer circuit 失效
    输入缓冲电路

    公开(公告)号：EP0527513A3

    公开(公告)日：1993-05-19

    申请号：EP92202166.2

    申请日：1992-07-15

    申请人： DELCO ELECTRONICS CORPORATION

    发明人： Kesler, Scott Birk ,  Gose, Mark Wendell

    IPC分类号： H03K19/003 ,  H03K19/018 ,  H03K3/2893

    CPC分类号： G05F3/225 ,  G05F3/30 ,  H03K3/2897

    摘要： An input buffer circuit receives data from a single ended transmission line (56) and provides an output signal (62) in one or two states in response to the state of the signal on the input (56). The circuit has hysteresis with temperature stable upper and lower threshold levels (V th , Vt 1 ). Temperature stability is achieved by providing first and second temperature dependent reference currents (I ref , I ref2 ), one with a positive temperature coefficient and one with a negative temperature coefficient, and by adjusting the temperature coefficients of the first and second reference currents (I ref , l ref2 ) so that the overall effect of all of the temperature coefficients of the circuit is substantially zero.

    A differential signal receiver
    3.
    发明公开
    A differential signal receiver 失效
    EmpfangsstufefürDifferenzsignale。

    公开(公告)号：EP0100177A1

    公开(公告)日：1984-02-08

    申请号：EP83304026.4

    申请日：1983-07-11

    申请人： FUJITSU LIMITED

    发明人： Emori, Shinji ,  Watanabe, Yoshio

    IPC分类号： H03K3/295 ,  H03K5/24

    CPC分类号： H03K5/2418 ,  H03K3/2897

    摘要： A differential signal receiver comprising a differential amplifier (15, 16, 17, 18, 23) for comparing differential voltages of differential input signals (Vi 1 , Vi 2 ) with a threshold voltage (Va, Vb), to provide logical output signals includes an emitter follower (19, 21) and an impedance means (5, 6, 7, 8, 9, 10). The outputs of the emitter followers (19, 21) are superimposed through the impedance means (5, 6, 7, 8, 9, 10) on the differential input signals (Vi 1 , Vi 2 ) so that the threshold voltage is variable and is controlled by controlling the input voltage (Ve, Vf) of the emitter follower (19, 21). This differential signal receiver has the advantage that a constant «1» or «0» level output signal is generated for a zero input signal and so provides a signal receiver having a high noise tolerance.

    摘要翻译： 一种差分信号接收机，包括用于将差分输入信号（Vi1，Vi2）的差分电压与阈值电压（Va，Vb）进行比较的差分放大器（15,16,17,18,23），以提供逻辑输出信号包括发射极 跟随器（19,21）和阻抗装置（5,6,7,8,9,10）。 发射极跟随器（19,21）的输出通过阻抗装置（5,6,7,8,9,10）叠加在差分输入信号（Vi1，Vi2）上，使得阈值电压是可变的并被控制 通过控制射极跟随器（19,21）的输入电压（Ve，Vf）。 该差分信号接收机具有为零输入信号产生恒定的“1”或“0”电平输出信号的优点，因此提供具有高噪声容限的信号接收机。

    DIFFERENTIAL COMPARATOR WITH ADJUSTABLE THRESHOLD AND TRACKING HYSTERESIS
    4.
    发明公开
    DIFFERENTIAL COMPARATOR WITH ADJUSTABLE THRESHOLD AND TRACKING HYSTERESIS 失效
    具有可调阈值和NACHLAUFHYSTERESE差分比较

    公开(公告)号：EP0797871A1

    公开(公告)日：1997-10-01

    申请号：EP95910070.0

    申请日：1994-12-16

    申请人： International Business Machines Corporation

    发明人： BONACCIO, Anthony, R.

    IPC分类号： H03K3 ,  H03K5

    CPC分类号： H03K3/2897 ,  H03K3/02337

    摘要： An improved programmable comparator circuit having a pair of differential inputs (VN, VP), that will, through respective identical resistor networks (16, 30, 17, 31), turn on a first current switch (22, 23) for comparing the differential of the inputs to a threshold voltage. The threshold voltage is established by the voltage created when a selected current is drawn through one of said resistor networks, such that a bias current, through one of the transistors forming the first current switch, and through a second current switch (12, 13) establishes a hysteresis current through one of the transistors forming the second current switch. Positive feed back means (28, 29, D1-D4) coupled to the output of said first current switch (22, 23) control the second current switch (12, 13).

    Schaltungsanordnung für einen Pegelwandler zum Umwandeln von TTL-Eingangssignalen in ECL-Ausgangssignale
    6.
    发明公开
    Schaltungsanordnung für einen Pegelwandler zum Umwandeln von TTL-Eingangssignalen in ECL-Ausgangssignale 失效
    对于用于将TTL输入信号转换成ECL输出信号的电平转换器电路布置。

    公开(公告)号：EP0464245A1

    公开(公告)日：1992-01-08

    申请号：EP90112782.9

    申请日：1990-07-04

    申请人： SIEMENS AKTIENGESELLSCHAFT

    发明人： Özoguz-Geissler, Nedim, Dipl.-Ing.

    IPC分类号： H03K3/2897

    CPC分类号： H03K3/013 ,  H03K3/02337 ,  H03K3/2897

    摘要： Die Schaltungsanordnung weist eine hochverstärkende Schmitt-Triggereinrichtung (16) mit zwei rückgekoppelten und Bipolartransistoren (T1, T2; T1', T2') aufweisenden Differenzverstärkern (I; II) auf. Zur Erniedrigung der Eckfrequenz der Schmitt-Triggereinrichtung (16) wird in jedem Differenzverstärker (I; II) mindestens ein zusätzlicher Kondensator (C1, C3, C5, C7; C2, C4, C6, C8) vorgesehen, wodurch die Eingangskapazität jedes Differenzverstärkers (I; II) erhöht ist und die Schmitt-Triggereinrichtung (16) eine Tiefpaßcharakteristik erhält.

    摘要翻译： 该电路装置具有高增益施密特触发器装置（16）具有两个差分放大器（I; II）具有反馈和具有双极型晶体管（T1，T2; T1”，T2' ）。 为了降低施密特触发装置（16），至少一个附加的电容器的截止频率（C1，C3，C5，C7; C2，C4，C6，C8）（I; II）在每个差分放大器，这增加了提供 每个差分放大器的输入电容（I; II），并提供施密特触发器装置（16）具有一个低通特性。

    Hysteresis circuit
    9.
    发明公开
    Hysteresis circuit 失效
    滞后电路

    公开(公告)号：EP0067441A3

    公开(公告)日：1985-01-23

    申请号：EP82105201

    申请日：1982-06-14

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Kusakabe, Hiromi ,  Yoshida, Yoshihiro

    IPC分类号： H03K03/295

    CPC分类号： H03K3/2897 ,  H03K3/023

    摘要： A differential pair of first and second transistors (Q10, Q11) for voltage comparison is provided, and a bias circuit (R12, R13) for setting a reference voltage is connected to the base of the second transistor. A differential pair of third and fourth transistors (Q12, Q13) is provided for reference voltage switching. The third and fourth transistors have their bases connected to the collectors of the first and second transistors and their collectors connected to the bias circuit in a positive feedback relation with respect to the base of the first transistor.