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    Failure detection in an analog-digital conversion function of a microcomputer
    2.
    发明公开
    Failure detection in an analog-digital conversion function of a microcomputer 审中-公开
    Erkennung eines Fehlers in der analog-digital Wandlungsfunktion eines Mikrorechners

    公开(公告)号：EP1337043A2

    公开(公告)日：2003-08-20

    申请号：EP03002877.3

    申请日：2003-02-08

    申请人： Niles Parts Co., Ltd.

    发明人： Koga, Osamu, c/o NILES PARTS CO., LTD. ,  Uno, Koji, c/o NILES PARTS CO., LTD. ,  Kawamura, Yasuharu, c/o NILES PARTS CO., LTD.

    IPC分类号： H03M1/10

    CPC分类号： H03M1/109 ,  H03M1/12

    摘要： In a microcomputer 10 including an output port 20 for outputting digital signals and an AD conversion register 18 for converting an analog voltage inputted to an AD input port 16 to a digital signal, the output port 20 and the AD input port 16 are directly connected. The output port 20 is allowed to selectively output H of a power source potential and L of a ground potential. The AD conversion register 18 is judged as being failed when any one of predetermined high order bits of the AD conversion register 18 is not 1 at the H output, or when any of one of the predetermined high order bits is not 0 at the L output. The digital conversion value of this AD conversion register 18 is not used. Thereby, existence/absence of failure of the AD conversion register is detected without using 2 channels for the AD input port.

    摘要翻译： 在包括用于输出数字信号的输出端口20和用于将输入到AD输入端口16的模拟电压转换为数字信号的AD转换寄存器18的微型计算机10中，输出端口20和AD输入端口16被直接连接。 允许输出端口20选择性地输出电源电位H和接地电位L。 当在H输出端的AD转换寄存器18的预定高位位中的任何一个不为1时，或当L个输出中的任一个预定高位不为0时，AD转换寄存器18被判断为失败 。 该AD转换寄存器18的数字转换值不被使用。 因此，在AD输入端口不使用2个通道的情况下检测到AD转换寄存器的故障的存在/不存在。

    SCHALTUNGSANORDNUNG ZUM TESTEN EINES A/D-WANDLERS FÜR SICHERHEITSKRITISCHE ANWENDUNGEN
    4.
    发明公开
    SCHALTUNGSANORDNUNG ZUM TESTEN EINES A/D-WANDLERS FÜR SICHERHEITSKRITISCHE ANWENDUNGEN 有权
    CIRCUIT FOR TESTING A / D转换器，用于安全关键

    公开(公告)号：EP1135860A1

    公开(公告)日：2001-09-26

    申请号：EP99961021.5

    申请日：1999-11-29

    申请人： Continental Teves AG & Co. oHG

    发明人： OEHLER, Peter ,  FEY, Wolfgang

    IPC分类号： H03M1/10

    CPC分类号： H03M1/109 ,  H03M1/12

    摘要： The invention relates to a circuit configuration with an A/D converter, for applications that are critical in terms of safety. The inventive circuit configuration is especially characterised by a ramp signal generator (11) for generating a ramp voltage which is delivered to the input of the A/D converter (10), and by a test circuit (12) for activating a test cycle. The test cycle comprises a first run of the ramp, with which a reference measurement of the ramp signal generator is carried out for compensating component tolerances, and a second run of the ramp, in which an error signal (F) is output if the value that is calculated for a transmission characteristic of the A/D converter lies outside of a predetermined tolerance range of the measured value of the transmission characteristic.

    Program controlled in-circuit test of analog to digital converters
    5.
    发明公开
    Program controlled in-circuit test of analog to digital converters 失效
    计算机在线电路模拟数字万用表。

    公开(公告)号：EP0342784A2

    公开(公告)日：1989-11-23

    申请号：EP89303148.4

    申请日：1989-03-30

    申请人： Hewlett-Packard Company

    发明人： Chism, Wayne R.

    IPC分类号： H03M1/10 ,  G01R31/28

    CPC分类号： G01R31/31915 ,  H03M1/109 ,  H03M1/12

    摘要： A device and process for programmatically controlled in-circuit pin checks and gross functionality tests of analog to digital converters. The tests provide deterministic bit checks for higher order bits and non-deterministic bit checks of lower order bits independent of other circuitry on the printed circuit board of which the digital to analog converter is a component.

    摘要翻译： 用于编程控制的在线引脚检查和模数转换器的总功能测试的器件和过程。 这些测试提供了对较低阶位的确定性位检查和低阶位的非确定性位检查，而与数字模拟转换器是其组件的印刷电路板上的其它电路无关。

    ADC Testing
    7.
    发明公开
    ADC Testing 审中-公开
    ADC-测试

    公开(公告)号：EP2372916A2

    公开(公告)日：2011-10-05

    申请号：EP11250312.3

    申请日：2011-03-16

    申请人： Ateeda Ltd.

    发明人： Hamilton, David , Ateeda Ltd. ,  Sharp, Gordon , Ateeda Ltd.

    IPC分类号： H03M1/12

    CPC分类号： H03M1/1071 ,  G06F17/18 ,  H03M1/109 ,  H03M1/12

    摘要： A histogram-based method for testing an electronic converter device, such as an analogue to digital converter, the method comprising: defining at least one histogram hyperbin arranged to store hits for at least one subrange of output codes; applying an input test stimulus to an input of the device to test a subrange of output codes matched to the hyperbin; and accumulating the histogram.

    摘要翻译： 一种用于测试诸如模数转换器的电子转换器装置的基于直方图的方法，所述方法包括：定义至少一个布置成存储输出码的至少一个子范围的命中的直方图超列; 将输入测试激励应用到所述设备的输入端以测试与所述超字节匹配的输出代码的子范围; 并累积直方图。

    METHOD OF TESTING AN ANALOG-TO-DIGITAL CONVERTER
    10.
    发明公开
    METHOD OF TESTING AN ANALOG-TO-DIGITAL CONVERTER 失效
    模拟数字转换器测试程序

    公开(公告)号：EP0852849A1

    公开(公告)日：1998-07-15

    申请号：EP97920922.0

    申请日：1997-05-28

    申请人： Philips Electronics N.V.

    发明人： DE VRIES, Ronald ,  ATZEMA, Botjo

    IPC分类号： H03M1

    CPC分类号： H03M1/109 ,  H03M1/12

    摘要： Only the value of the least-significant bit, or of some of the less-significant bits is used in order to test an analog-to-digital converter in an integrated circuit. The information concerning the differential and the integral non-linearity can be determined from the values of said less-significant bit. Furthermore, the functionality of the analog-to-digital converter is tested by counting the number of changes of the least-significant bit and by comparing this number with the value formed by the other bits.