利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

191 条记录 (耗时 0.026 秒)

    An amplifier having a bias compensation that uses a current mirror circuit
    43.
    发明专利
    An amplifier having a bias compensation that uses a current mirror circuit 审中-公开

    公开(公告)号：JP2005512376A

    公开(公告)日：2005-04-28

    申请号：JP2003550353

    申请日：2002-11-20

    申请人： コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィKoninklijke Philips Electronics N.V.

    发明人： シフェン、ルオ

    IPC分类号： H03F3/213 ,  H03F1/02 ,  H03F1/30 ,  H03F3/19

    CPC分类号： H03F1/302 ,  H03F3/19

    摘要： 増幅器回路は、増幅トランジスタとｄｃバイアス回路を備える。 ｄｃバイアス回路は、その増幅トランジスタを有する電流ミラーにおける第１のトランジスタと、増幅器トランジスタと第１のトランジスタの両方にベース電流を提供するための第２のトランジスタを備える。 ｄｃバイアス電源は、直列に接続された抵抗器とインダクタを介して第２のトランジスタのベースに連結される。 バイパスキャパシタは、接地と、抵抗器とインダクタとの間のノードとの間に連結される。 このように、入力電力の増加に起因する増幅トランジスタのベース−エミッタジャンクションにおける電圧降下の減少が補償される。 更に、増幅トランジスタと第１のトランジスタとの間のエミッタ領域比および／またはバイアス抵抗器とミラー第１のトランジスタと連結される対応するトランジスタとの比を適切にスケーリングすることによって、増幅トランジスタでの静電流は、第１のトランジスタのそれに対して正比例されることが出来る。

    Variable gain amplifier
    45.
    发明专利
    Variable gain amplifier 审中-公开
    可变增益放大器

    公开(公告)号：JP2005064766A

    公开(公告)日：2005-03-10

    申请号：JP2003290953

    申请日：2003-08-08

    申请人： Alps Electric Co Ltd ,  アルプス電気株式会社

    发明人： SUZUKI TAKEO ,  ASAO AKIRA

    IPC分类号： H03G3/10 ,  H03F1/30 ,  H03F3/45

    CPC分类号： H03F3/45085 ,  H03F1/302 ,  H03F2203/45318 ,  H03F2203/45366

    摘要： PROBLEM TO BE SOLVED: To provide a gain control amplifier of a balancing type capable of obtaining sufficient performance even at a low source voltage.
    SOLUTION: The amplifier comprises first and second transistors 1 and 2 which are differentially connected and have their emitters connected to a first power source 3, and third and fourth transistors 4 and 5 which are differentially connected and have their emitters connected to a second constant current source 6. Each of the collectors of the first and fourth transistors 1 and 5 is connected to a source terminal via a common first load resistance 7, and each of the collectors of the second and the third transistors 2 and 4 is connected to the power source terminal via a common second resistance 8. High frequency signals are inputted between the respective bases of the first and the third transistors 1 and 4 on the one hand and between the respective bases of the second and the fourth transistors 2 and 5 on the other, and the current of the second constant current source 6 is made variable within a range at least below the current value of the first constant current source 3.
    COPYRIGHT: (C)2005,JPO&NCIPI

    摘要翻译： 要解决的问题：提供即使在低电源电压下能够获得足够性能的平衡型增益控制放大器。 解决方案：放大器包括第一和第二晶体管1和2，第一和第二晶体管1和2差分连接并且其发射极连接到第一电源3，第三和第四晶体管4和5被差分连接并且其发射极连接到 第二恒流源6.第一和第四晶体管1和5的每个集电极经由公共第一负载电阻7连接到源极端子，并且第二和第三晶体管2和4的每个集电极被连接 通过共同的第二电阻8到电源端子。高频信号一方面在第一和第三晶体管1和4的各个基极之间以及在第二和第四晶体管2和5的各个基极之间输入 另一方面，第二恒流源6的电流在至少低于第一恒定电流源3的电流值的范围内变化。 YRIGHT：（C）2005，JPO＆NCIPI

    Ideal operational amplifier layout technology for reducing package stress, and composition thereof
    46.
    发明专利
    Ideal operational amplifier layout technology for reducing package stress, and composition thereof 审中-公开
    用于减少包装应力的理想的操作放大器布局技术及其组成

    公开(公告)号：JP2005057282A

    公开(公告)日：2005-03-03

    申请号：JP2004223048

    申请日：2004-07-30

    申请人： Texas Instr Inc ,  テキサス インスツルメンツ インコーポレイテツド

    发明人： GRABHAM MARTY A ,  CLINTON BRIAN LANCE

    IPC分类号： H01L27/04 ,  H01L21/82 ,  H01L21/822 ,  H03F1/30 ,  H03F3/45

    CPC分类号： H03F3/45475 ,  H03F1/302 ,  H03F3/45085

    摘要： PROBLEM TO BE SOLVED: To provide an operational amplifier layout technology for reducing package stress.
    SOLUTION: The method for reducing the package stress includes a step, where matched components(A, B) of the operational amplifier are substantially located in a region having minimum stress gradient of die. The region is positioned at the center(C) of the die. The center is also the common center of gravity. The matched components are a current mirror input step. In an embodiment, the semiconductor composition includes the die, having the region of the minimum stress gradient and the operational amplifier which contains the matched components substantially located in the region.
    COPYRIGHT: (C)2005,JPO&NCIPI

    摘要翻译： 要解决的问题：提供用于降低封装应力的运算放大器布局技术。 解决方案：减小封装应力的方法包括一个步骤，其中运算放大器的匹配组件（A，B）基本上位于具有最小应力模具应力梯度的区域中。 该区域位于模具的中心（C）处。 该中心也是共同的重心。 匹配的组件是电流镜像输入步骤。 在一个实施例中，半导体组成包括具有最小应力梯度的区域的管芯和包含基本上位于该区域中的匹配部件的运算放大器。 版权所有（C）2005，JPO＆NCIPI

    Power amplifying circuit
    48.
    发明专利
    Power amplifying circuit 有权

    公开(公告)号：JP2004236173A

    公开(公告)日：2004-08-19

    申请号：JP2003024579

    申请日：2003-01-31

    申请人： Toshiba Corp ,  Toshiba Lsi System Support Kk ,  東芝エルエスアイシステムサポート株式会社 ,  株式会社東芝

    发明人： ABE HIROYUKI

    IPC分类号： H03F3/21 ,  H03F1/02 ,  H03F1/30 ,  H03F3/04

    CPC分类号： H03F1/302 ,  H03F1/0211 ,  H03F1/0261 ,  H03F3/04

    摘要： PROBLEM TO BE SOLVED: To reduce power consumption more at a low output time in a power amplifying circuit having a high output time and the low output time.
    SOLUTION: In addition to a bias current generation circuit 60 which supplies a bias current Ibias, an additional bias current generation circuit 110 which supplies an additional bias current Iad is provided to a base of an amplifying portion transistor Q. Although the additional bias current generation circuit 110 supplies the additional bias current Iad to the base of the amplifying portion transistor Q when a power amplifying circuit 100 is in a high output time, it does not supply the additional bias current Iad when the power amplifying circuit 100 is in a low output time. Thus, a bias point at the low output time becomes lower than the high output time, and power consumption of the power amplifying circuit 100 is more reduced.
    COPYRIGHT: (C)2004,JPO&NCIPI

    Power amplifier including bias current control circuit
    50.
    发明专利
    Power amplifier including bias current control circuit 审中-公开

    公开(公告)号：JP2004040769A

    公开(公告)日：2004-02-05

    申请号：JP2003101218

    申请日：2003-04-04

    申请人： Kankoku Joho Tsushin Gakuen ,  学校法人韓国情報通信学園

    发明人： KIM JI HOON ,  NOH YOUN SUB ,  PARK CHUL SOON ,  KIM JOON HYUNG

    IPC分类号： H03F3/24 ,  H03F1/30 ,  H03F3/04 ,  H03F3/19 ,  H03F3/20 ,  H03G3/10

    CPC分类号： H03F1/302 ,  H03F3/04 ,  H03F2200/18

    摘要： PROBLEM TO BE SOLVED: To provide a power amplifier module including a bias current control circuit for a mobile communication terminal, which hardly increase the chip size and power consumption.
    SOLUTION: The power amplifier for the mobile communication terminal includes a transistor Q1 for amplification, a bias circuit 101 and a bias current control circuit 103, the transistor Q1 for amplification generates an output signal of the mobile communication terminal, and the bias circuit 101 includes transistors Q2 and Q3 for bias and outputs a bias current for biasing the transistor Q1 for amplification. In accordance with a control signal, the bias current control circuit 103 adjusts a bias current to control an operating current of the transistor for amplification, and the control signal is determined by a power level of the output signal of the mobile communication terminal. When the output power level is low, the bias current control circuit 103 decreases the bias current and the operating current of the transistor for amplification so that the power addition efficiency is improved as a result.
    COPYRIGHT: (C)2004,JPO