Inspection method of semiconductor integrated circuit and semiconductor integrated circuit
    1.
    发明专利
    Inspection method of semiconductor integrated circuit and semiconductor integrated circuit 审中-公开
    半导体集成电路和半导体集成电路检测方法

    公开(公告)号:JP2009074850A

    公开(公告)日:2009-04-09

    申请号:JP2007242362

    申请日:2007-09-19

    Inventor: KAWAMOTO IPPEI

    Abstract: PROBLEM TO BE SOLVED: To provide an inspection method of a semiconductor integrated circuit for inspecting a circuit having various constitutions without increasing terminals required for implementing an inspection.
    SOLUTION: Switch circuits 4, 6 and a constant current source 7 are provided in an operational amplifier 1. A constant current source 5 for supplying a constant current during a normal operation is switched by a signal from an external apparatus through a control signal terminal 8. When a power supply voltage of the operational amplifier 1 is set to a normal voltage level VB, a slew rate is measured in a state that a micro constant current is supplied. When the power supply voltage is set to an inspection voltage VT, the constant current during the normal operation is supplied in a state that a voltage corresponding to the inspection voltage VT is applied across a phase compensation capacitor 14. The slew rate is measured again on the same condition as the initial measurement. The measured results before and after an application of the inspection voltage VT are compared, and the quality is determined.
    COPYRIGHT: (C)2009,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种用于检查具有各种结构的电路的半导体集成电路的检查方法,而不增加实现检查所需的端子。 解决方案:开关电路4,6和恒流源7设置在运算放大器1中。用于在正常操作期间提供恒定电流的恒流源5通过来自外部装置的信号通过控制来切换 信号端子8.当运算放大器1的电源电压被设定为正常电压电平VB时,在提供微恒定电流的状态下测量转换速率。 当电源电压设定为检查电压VT时,在相对于相位补偿电容器14施加与检查电压VT对应的电压的状态下,供给正常工作期间的恒定电流。再次对压摆率进行测量 与初始测量相同的条件。 对检查电压VT的施加前后的测定结果进行比较,确定质量。 版权所有(C)2009,JPO&INPIT

    Overcurrent protection circuit
    2.
    发明专利
    Overcurrent protection circuit 有权
    过流保护电路

    公开(公告)号:JP2013062976A

    公开(公告)日:2013-04-04

    申请号:JP2011200577

    申请日:2011-09-14

    Abstract: PROBLEM TO BE SOLVED: To realize an overcurrent protection circuit capable of determining a plurality of current levels with one comparator.SOLUTION: A channel in which overcurrent detection is performed is selected in a channel switching circuit 50, a plurality of threshold values for respective channels are set in order in a threshold value switching circuit 60, and current detection for respective channels is performed by a comparison circuit 70 which consists of one comparator. For this reason, a plurality of current levels can be determined by one comparator. Therefore, many comparators become unnecessary, increase in a circuit size can be suppressed, and increase in cost can be suppressed.

    Abstract translation: 要解决的问题:实现能够利用一个比较器确定多个电流电平的过电流保护电路。 解决方案:在通道切换电路50中选择执行过电流检测的通道,在阈值切换电路60中按顺序设定各通道的多个阈值,并执行各通道的电流检测 通过由一个比较器组成的比较电路70。 因此,可以由一个比较器确定多个电流电平。 因此,许多比较器变得不必要,可以抑制电路尺寸的增加,并且可以抑制成本的增加。 版权所有(C)2013,JPO&INPIT

    Abnormal current detection circuit
    3.
    发明专利
    Abnormal current detection circuit 有权
    异常电流检测电路

    公开(公告)号:JP2009193122A

    公开(公告)日:2009-08-27

    申请号:JP2008030424

    申请日:2008-02-12

    Abstract: PROBLEM TO BE SOLVED: To provide an abnormal current detection circuit for reducing the time for supplying overcurrent to a load. SOLUTION: When an FET1 is turned on, an abnormal current detection circuit 18 detects that currents IL flowing through a coil 2 change, and decide abnormal current when detecting that the currents IL have changed in excess of a prescribed range. Concretely, the terminal voltage of the coil 2 is compared with first and second reference voltages Vt1 and Vt2 by a first comparator 7 and a second comparator 8, and a time beteen when the terminal voltages exceeds the voltage Vt1 and when the terminal voltage exceeds the voltage Vt2 is measured by an EXOR gate 11 and a timer counter 12, the measurement data are stored in an EEPROM 14. When the difference between the current measurement time CD_N and previous time data CD_O stored in the EEPROM 14 exceeds α, a comparator 15 determines abnormal current. COPYRIGHT: (C)2009,JPO&INPIT

    Abstract translation: 要解决的问题:提供用于减少向负载提供过电流的时间的异常电流检测电路。 解决方案:当FET1导通时,异常电流检测电路18检测出流过线圈2的电流IL发生变化,并且当检测到电流IL已超出规定范围时,判定异常电流。 具体地说,通过第一比较器7和第二比较器8将线圈2的端子电压与第一和第二参考电压Vt1和Vt2进行比较,当端子电压超过电压Vt1时,以及当端子电压超过 电压Vt2由EXOR门11和定时器计数器12测量,测量数据被存储在EEPROM14中。当存储在EEPROM14中的当前测量时间CD_N和先前时间数据CD_O之间的差超过α时,比较器15 确定异常电流。 版权所有(C)2009,JPO&INPIT

    Semiconductor integrated circuit and inspection method of semiconductor integrated circuit
    4.
    发明专利
    Semiconductor integrated circuit and inspection method of semiconductor integrated circuit 审中-公开
    半导体集成电路的半导体集成电路和检测方法

    公开(公告)号:JP2009270912A

    公开(公告)日:2009-11-19

    申请号:JP2008121136

    申请日:2008-05-07

    CPC classification number: H01L2924/0002 H01L2924/00

    Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit for shortening the inspection time while suppressing the increase of external terminals as much as possible when data for inspection is serially input from the outside.
    SOLUTION: Power of 3V is supplied from the outside to a circuit section 4 to be inspected via a power supply input terminal 12, and power of 5V is supplied to an inspecting circuit section 5 via a power supply input terminal 13. The inspecting circuit section 5 converts the data input serially in a clock cycle via an inspection data input terminal 10 into a parallel state, and the converted data for inspection is level-converted by a level shift circuit 9 and is provided to the circuit section 4 to be inspected.
    COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种用于缩短检查时间的半导体集成电路,同时在从外部串行输入检查数据的同时尽可能多地抑制外部端子的增加。 解决方案:3V电源通过电源输入端子12从外部供给到电路部分4进行检查,5V电源通过电源输入端子13提供给检查电路部分5。 检查电路部分5将通过检查数据输入端子10在时钟周期中串行输入的数据转换为并行状态,并且用于检查的转换数据由电平移位电路9进行电平转换,并被提供给电路部分4至 被检查。 版权所有(C)2010,JPO&INPIT

    Backflow prevention circuit
    5.
    发明专利
    Backflow prevention circuit 有权
    逆流预防电路

    公开(公告)号:JP2008154176A

    公开(公告)日:2008-07-03

    申请号:JP2006342825

    申请日:2006-12-20

    Abstract: PROBLEM TO BE SOLVED: To provide a backflow prevention circuit capable of performing suitable circuit operation by reducing the number of circuit elements.
    SOLUTION: Between a power supply terminal 12 and a resistance element 9 that pulls up an input terminal 2, an FET 16 is connected in such a way that the direction of a parasitic diode 16D becomes inverse when it is viewed from a side of the input terminal 2, and a clamp circuit 22 turns on the FET 16 when an over-voltage is applied to the input terminal 2.
    COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种能够通过减少电路元件的数量来执行适当的电路操作的防回流电路。 解决方案:在电源端子12和上拉输入端子2的电阻元件9之间,FET16以从侧面观察到的寄生二极管16D的方向变为反向的方式连接 ,并且当过电压施加到输入端子2时,钳位电路22接通FET 16。版权所有:(C)2008,JPO&INPIT

    Dc power unit
    6.
    发明专利
    Dc power unit 有权
    直流电源单元

    公开(公告)号:JP2006011499A

    公开(公告)日:2006-01-12

    申请号:JP2004183264

    申请日:2004-06-22

    Abstract: PROBLEM TO BE SOLVED: To provide a DC power unit having a standby mode and an active mode for preventing an output voltage from being temporarily lowered due to the influence of an internal capacitor for phase compensation when switching the standby mode to the active mode.
    SOLUTION: A power source (2a) for active mode to be controlled by an output transistor (Q1) in which the output of an error amplifier (OP1) having a capacitor (C1) for phase compensation whose one end is connected to the output terminal (12) is received through a first switch (SW1) by the control terminal (16) and a power source (3) for standby mode are switched, and power supply is executed. When the operation of the power source for active mode is stopped, the first switch is put in a non-conductive status, and the potential of the output terminal of the error amplifier is maintained as a value equal to the potential of the output terminal in the regular operation of the power source for active mode by an auxiliary constant voltage source (Eo).
    COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种具有待机模式和有功模式的直流电源单元,用于在将待机模式切换到活动状态时,防止输出电压由于用于相位补偿的内部电容器的影响而暂时降低 模式。 解决方案:用于主动模式的电源(2a)由输出晶体管(Q1)控制,在该输出晶体管(Q1)中,具有用于相位补偿的电容器(C1)的误差放大器(OP1)的输出端连接到 通过控制端子(16)通过第一开关(SW1)接收输出端子(12),切换用于待机模式的电源(3),并且执行电源。 当停止用于主动模式的电源的操作时,第一开关处于非导通状态,并且将误差放大器的输出端子的电位维持为等于输出端子的电位的值 通过辅助恒压源(Eo)对主动模式的电源进行常规操作。 版权所有(C)2006,JPO&NCIPI

    Overcurrent protection circuit
    7.
    发明专利
    Overcurrent protection circuit 有权
    过流保护电路

    公开(公告)号:JP2013085443A

    公开(公告)日:2013-05-09

    申请号:JP2012113681

    申请日:2012-05-17

    Abstract: PROBLEM TO BE SOLVED: To provide an overcurrent protection circuit that implements overcurrent detection without employing a plurality of comparators.SOLUTION: A drain-source voltage VDS is detected as a detection signal of a load current value I supplied to a load 3 and is AD-converted in an AD converter 6d. The load current value I is acquired from a value digitized by the AD converter 6d and an additive value corresponding to the load current value I is computed by an operation using a relational expression or by means of a table indicating a relationship between the load current value I and the additive value, the additive value is added up, and if the integral value reaches a predetermined determination threshold, a current flowing to the load 3 is limited. When the load current value I is equal to or lower than a constant value, a subtractive value is subtracted from the integral value. If the integral value reaches a first determination threshold, overcurrent detection is asserted.

    Abstract translation: 要解决的问题:提供一种在不使用多个比较器的情况下实现过电流检测的过电流保护电路。 解决方案:漏极源电压VDS被检测为提供给负载3的负载电流值I的检测信号,并且在AD转换器6d中进行AD转换。 从由AD转换器6d数字化的值获取负载电流值I,并且通过使用关系表达式的操作或借助于表示负载电流值之间的关系的表来计算负载电流值I I和加法值,加法值相加,如果积分值达到预定的确定阈值,则流向负载3的电流受到限制。 当负载电流值I等于或小于常数值时,从积分值中减去减法值。 如果积分值达到第一确定阈值,则断言过电流检测。 版权所有(C)2013,JPO&INPIT

    Motor drive circuit and abnormality determining method of motor
    8.
    发明专利
    Motor drive circuit and abnormality determining method of motor 有权
    电机驱动电路和异常检测方法

    公开(公告)号:JP2009254199A

    公开(公告)日:2009-10-29

    申请号:JP2008102407

    申请日:2008-04-10

    Inventor: KAWAMOTO IPPEI

    Abstract: PROBLEM TO BE SOLVED: To provide a motor drive circuit to detect an abnormality which does not carry a big change to a drive current of a motor. SOLUTION: When a transistor Q3 is turned on by a drive pulse Pd output from a drive pulse generating circuit 13, a capacitor C1 provided between one terminal of the motor 1 and a ground line 5 is charged by current running through a winding of the motor 1. Comparators 15 and 16 compare a terminal voltage Vc of the capacitor C1 after charged with a first threshold voltage Vth1 and a second threshold voltage Vth2. A determination circuit 17 detects a change of an inductance of the winding of the motor 1 based on levels of output signals Sa and Sb of the comparators 15 and 16. COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种马达驱动电路,用于检测不会对马达的驱动电流产生大的变化的异常。 解决方案:当晶体管Q3由驱动脉冲发生电路13输出的驱动脉冲Pd导通时,设置在电动机1的一个端子与接地线5之间的电容器C1通过绕组的电流进行充电 比较器15和16比较在充电第一阈值电压Vth1和第二阈值电压Vth2之后的电容器C1的端子电压Vc。 确定电路17基于比较器15和16的输出信号Sa和Sb的电平来检测电动机1的绕组的电感的变化。版权所有:(C)2010,JPO&INPIT

    Overvoltage protecting circuit
    9.
    发明专利
    Overvoltage protecting circuit 审中-公开
    过电压保护电路

    公开(公告)号:JP2009106055A

    公开(公告)日:2009-05-14

    申请号:JP2007275017

    申请日:2007-10-23

    Abstract: PROBLEM TO BE SOLVED: To provide an overvoltage protecting circuit for protecting a load from overvoltage without stopping power supply even if overvoltage occurs between DC power supply lines while an increase of a circuit area is suppressed. SOLUTION: A voltage control circuit 20 switches a transistor M11 in accordance with a terminal voltage VC of a capacitor C11, which rises with a rise of power voltage VB, when a power voltage VB between a power supply line 17 and a ground line 18 exceeds a target line and rises, and repeats charging/discharging of the capacitor C11. A voltage value of the terminal voltage VC is limited to a voltage value between an upper limit value and a lower limit value of protection setting voltage. COPYRIGHT: (C)2009,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种过电压保护电路,用于在不停止电源的情况下保护负载免受过电压,即使直流电源线之间发生过电压,同时抑制了电路面积的增加。 解决方案:当电源线17和地之间的电源电压VB时,电压控制电路20根据电容器C11的端子电压VC切换晶体管M11,电容器C11随着电源电压VB的上升而上升 线18超过目标线并升高,并重复电容器C11的充电/放电。 端子电压VC的电压值被限制在上限值和保护设定电压的下限值之间的电压值。 版权所有(C)2009,JPO&INPIT

    Signal generator
    10.
    发明专利
    Signal generator 审中-公开
    信号发生器

    公开(公告)号:JP2007013916A

    公开(公告)日:2007-01-18

    申请号:JP2005345839

    申请日:2005-11-30

    Inventor: KAWAMOTO IPPEI

    CPC classification number: H03K17/166 H03K4/00 H03K4/92

    Abstract: PROBLEM TO BE SOLVED: To provide a signal generator capable of attaining noise reduction and also suppressing increase in a switching loss in a device for electrifying a current signal of a predetermined waveform to an electric load.
    SOLUTION: A signal generating means 42 of a driving device 1 generates a control signal in which rising and falling portions of a lamp driving current become a sine wave shape when performing switching control on an FET 2 that controls a current flowing top a lamp 4, and outputs the generated signal to the FET 2. Specifically, an approximate waveform generating means 41 charges a capacitor 37 during a rising term of a PWM signal and discharges the capacitor 37 during a falling term to generate a sine wave-shaped signal through diagonal approximation while switching a terminal voltage increase extent and decrease extent over a plurality of stages and the generated signal is outputted via a low-pass filter 39.
    COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种能够实现噪声降低的信号发生器,并且还抑制用于使预定波形的电流信号向电负载充电的装置中的开关损耗的增加。 解决方案:驱动装置1的信号发生装置42产生一个控制信号,其中当对控制流过顶部a的电流进行开关控制时,灯驱动电流的上升和下降部分变为正弦波形状 灯4,并将产生的信号输出到FET 2.具体地,近似波形发生装置41在PWM信号的上升期期间对电容器37充电,并且在下降期间对电容器37进行放电,以产生正弦波形信号 通过对角线近似,同时在多个级上切换端子电压增加范围并减小范围,并且产生的信号经由低通滤波器39输出。(C)2007,JPO和INPIT

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