Abstract:
본 발명의 실시 예에 따른 입력 신호를 증폭시키기 위한 증폭 회로는 입력 신호를 수신하도록 구성되는 입력 정합 회로 및 증폭 회로의 동작 주파수 대역 밖에서 입력 신호에 대한 이득을 감쇄시키도록 구성되는 입력 감쇄 회로를 포함하는 입력단; 입력단으로부터 제공되는 입력 신호를 증폭시키도록 구성되는 트랜지스터; 및 트랜지스터에 의해 증폭된 신호를 수신하도록 구성되는 출력 정합 회로 및 증폭 회로의 동작 주파수 대역 밖에서 입력 신호에 대한 이득을 감쇄시키도록 구성되는 출력 감쇄 회로를 포함하는 출력단을 포함하고, 입력 감쇄 회로는 접지 전압에 각각 연결된 제 1 저항 및 제 2 저항, 입력 정합 회로 및 제 2 저항 사이에 연결된 제 1 수동 소자, 그리고 제 1 수동 소자와 제 1 저항 사이에 연결된 제 2 수동 소자를 포함하고, 그리고 제 1 수동 소자는 인덕터 및 커패시터 중 하나이고 그리고 제 2 수동 소자는 인덕터 및 커패시터 중 다른 하나이다.
Abstract:
PROBLEM TO BE SOLVED: To realize appropriate AGC for a desired wave signal and an interference wave signal. SOLUTION: There are provided attenuator circuits 42-44 cascade-connected to a received signal SRX and differential amplifiers 51-54 to which the received signal SRX and output signals of the attenuator circuits 42-44 are supplied, respectively. There are also provided resistors R55, R56 connected in common to output terminals of the differential amplifiers 51-54 so as to extract level-controlled output signals and a control current generating circuit 34 for generating control currents I51-I54 of predetermined characteristics from first and second AGC voltages VAGC, VOL. The control currents I51-I54 outputted from the control current generating circuit 34 are supplied to the differential amplifiers 51-54 as their operation switching and gain control signals. A control current Im equal to the control currents I51-I54 is negatively fed back by the control current generating circuit 34. COPYRIGHT: (C)2006,JPO&NCIPI
Abstract:
스위칭 가능한 증폭기 및 비교기 회로는 반전 입력, 비반전 입력, 제1 차동 출력 및 제2 차동 출력을 갖는 연산 증폭기를 포함하고, 제1 차동 출력은 반전 입력에 스위칭 가능하게 결합되며 제2 차동 출력은 비반전 입력에 스위칭 가능하게 결합된다. 제1 피드백 캐패시터는 반전 입력에 결합되고 제1 차동 출력에 스위칭 가능하게 결합되며, 제2 피드백 캐패시터는 비반전 입력에 결합되고 제2 차동 출력에 스위칭 가능하게 결합된다. 용량성 부하는 제1 차동 출력과 제2 차동 출력 사이에 스위칭 가능하게 결합된다. 다이오드 클램프 회로는 제1 차동 출력과 제2 차동 출력 사이에 스위칭 가능하게 결합된다. 저항성 부하는 제1 차동 출력과 제2 차동 출력 사이에 스위칭 가능하게 결합된다.
Abstract:
PROBLEM TO BE SOLVED: To enable preventing distortion of a waveform by applying a sufficient idle current to a transistor for amplification in the vicinity of the maximum level of an output power, and to enable improving power efficiency in a region where the output power is low, in a high-frequency power amplifier circuit for giving a bias to the transistor for amplification by a current mirror system. SOLUTION: A detection circuit (240) is provided which consists of a detection transistor (Q1) having a control terminal receiving the AC component of the input signal of the amplification transistor (213) of the final stage, current mirror circuits (Q2, Q3) for transferring a current flowing to the transistor, and a current-voltage converting means (Q4) for converting a current of the transfer side of the current mirror circuits into a voltage. A voltage from a bias circuit (230) for generating the bias voltage of the amplification transistor is applied to the control terminal of the detection transistor of the detection circuit, and the output of the detection circuit is applied to the control terminal of the amplification transistor of the final stage. COPYRIGHT: (C)2006,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To further reduce power consumption at the time of a small signal output. SOLUTION: When a radio signal is transmitted to a small cell according to an amplifying operation mode designated by a main controller 10 in an amplifying control circuit 120, a feeding control circuit 121 is controlled to stop feeding to a main amplifier 101 and to feed to an error amplifier 110 in stead of the main amplifier 101. Also, switchover switches 112 and 113 are controlled to switch a movable point to a fixed point "b" side. Thus, the radio signal amplified by the error amplifier 110 is transmitted as the radio signal of power corresponding to the small cell. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide a transmission power controller performing high precision transmission power control over a wide dynamic range while decreasing the number of steps required for regulating a transmission power controller. SOLUTION: The transmission power controller comprises a first variable amplification circuit 122 having resolution of 1 dB and a second variable amplification circuit 123 having resolution of 0.1 dB, a section 106 calculating a correction value for compensating degradation of transmission power accuracy due to environmental variation of frequency characteristics and temperature characteristics, and a correction value for compensating transmission power error, a section 107 for calculating a specified transmission power being outputted to a communication partner corrected based on a received signal, and first and second set value calculating sections 108 and 109 for calculating gain values being set in the first and second variable amplification circuits 122 and 123 based on the corrected transmission power. COPYRIGHT: (C)2005,JPO&NCIPI