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公开(公告)号：US4506233A
公开(公告)日：1985-03-19
申请号：US392566
申请日：1982-06-28
CPC分类号： H03H11/1291 , Y10S331/02
摘要： Control signals for switching the bandwidth of a filter in a phase locked loop are provided by comparator circuits having time delays at their inputs that vary as a function of the magnitude of changes in the outputs from a phase comparator. These variable time delays permit the comparator circuits to produce an output having a duration of the proper length in order to permit the filter to have a large bandwidth for a long enough time to permit the phase locked loop to become locked.
摘要翻译： 用于切换锁相环中的滤波器的带宽的控制信号由比较器电路提供，其比较器电路在其输入端具有随相位比较器的输出变化幅度变化的函数。 这些可变时间延迟允许比较器电路产生具有适当长度的持续时间的输出，以便允许滤波器在足够长的时间内具有大的带宽以允许锁相环被锁定。
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2.发明授权Voltage controlled oscillator having approximately constant modulation sensitivity 失效压控振荡器具有大致恒定的调制灵敏度
公开(公告)号：US4503402A
公开(公告)日：1985-03-05
申请号：US409522
申请日：1982-08-19
CPC分类号： H03C3/225 , H03B5/1203 , H03B5/1228 , H03B5/1243 , H03B2200/004 , H03C2200/005
摘要： A voltage controlled oscillator for use in a phase locked loop is provided with a first varactor circuit that responds to a control signal to set the center frequency of the oscillator, and with a second varactor circuit comprising a modulation varactor that responds to a modulation signal to cause the oscillator to produce a modulated output. The modulation sensitivity of the oscillator is made relatively constant between upper and lower center frequencies by applying a portion of the modulation signal to the first varactor circuit in addition to the control signal.
摘要翻译： 在锁相环中使用的压控振荡器设置有第一变容二极管电路，其响应于控制信号来设置振荡器的中心频率，并且具有第二变容二极管电路，所述第二变容二极管电路包括响应于调制信号的调制变容二极管 使振荡器产生调制输出。 除了控制信号之外，通过将一部分调制信号施加到第一变容二极管电路，振荡器的调制灵敏度在上下中心频率之间相对恒定。
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3.发明授权Duplex radio transceiver having improved data/tone and audio modulation architecture 失效具有改进的数据/音调和音频调制架构的双工无线电收发器
公开(公告)号：US4680749A
公开(公告)日：1987-07-14
申请号：US734369
申请日：1985-05-15
申请人： Arvid E. Englund , Stephen R. Wynn , Rodney A. Dolman , Frederick J. Highton , Rickey D. Harris
发明人： Arvid E. Englund , Stephen R. Wynn , Rodney A. Dolman , Frederick J. Highton , Rickey D. Harris
CPC分类号： H04B14/006 , H04B1/406
摘要： A novel circuit architecture is disclosed for achieving audio, tone, and digital data signal modulation in a full duplex radio transceiver. A single signal source is utilized to generate both transmitted carrier and receiver local oscillator injection signals. Yet the architecture is such that the transmitted data does not appear at the receiver's discriminator output--while a "side tone" of transmitted audio does so appear. The audio to be transmitted is used to frequency modulate a VCO and provide the receiver first mixer injection signal as well as a "carrier" input to a phase modulator. The data/tone signals are on the other hand, combined and integrated in a complex waveform and input to control the phase modulator. The resulting FM (data/tone and voice) output from the phase modulator is then input to a conventional duplexed r.f. transmitter.
摘要翻译： 公开了一种用于在全双工无线电收发器中实现音频，音调和数字数据信号调制的新型电路架构。 利用单个信号源来产生传输的载波和接收机本地振荡器注入信号。 然而，架构使得所发送的数据不出现在接收机的鉴别器输出端，而传输的音频的“侧音”出现。 要传输的音频用于对VCO进行频率调制，并提供接收机第一混频器注入信号以及向相位调制器输入“载波”。 另一方面，数据/音调信号被组合并集成在复杂波形和输入中以控制相位调制器。 然后将从相位调制器输出的所得FM（数据/音调和语音）输入到常规的双工r.f. 发射机。
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公开(公告)号：US4363004A
公开(公告)日：1982-12-07
申请号：US198831
申请日：1980-10-20
摘要： A combining and filter circuit is provided to connect the acquisition circuit and phase detector circuit to the voltage controlled oscillator in a phase locked loop. The combining and filter circuit includes twin-T filters for removing reference frequency signals. An output circuit includes series resistors and capacitors, and reverse poled Schottky diodes which provide rapidly changing acquisition signals that are relatively noise free.
摘要翻译： 提供组合和滤波电路，用于将采集电路和相位检测器电路连接到锁相环中的压控振荡器。 组合和滤波电路包括用于去除参考频率信号的双T滤波器。 输出电路包括串联电阻器和电容器，反向极化肖特基二极管提供相对无噪声的快速变化的采集信号。
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公开(公告)号：US4128811A
公开(公告)日：1978-12-05
申请号：US812919
申请日：1977-07-05
摘要： The relative frequency of two signals is indicated by applying pulses indicative of the two signals to respective bistable flip-flops. The flip-flops are interconnected to produce two binary outputs each of which varies between two binary values in response to occurrence of the pulses. These binary outputs are applied to a logic circuit which produces a binary output that varies between two binary values as a function of the similarity and difference in binary values of the two flip-flop signals. The binary output of the logic circuit is applied to two further bistable flip-flops along with the pulses to control the outputs of the further flip-flops. The outputs of the further flip-flops produce respective signals which indicate the relative frequency of the two signals, and which can be used to change this relative frequency.
摘要翻译： 通过将表示两个信号的脉冲施加到相应的双稳态触发器来指示两个信号的相对频率。 触发器互连以产生两个二进制输出，每个二进制输出响应于脉冲的发生而在两个二进制值之间变化。 这些二进制输出被应用于产生二值输出的逻辑电路，该二进制输出在两个二进制值之间变化，作为两个触发器信号的二进制值的相似性和差值的函数。 逻辑电路的二进制输出与脉冲一起被应用于两个另外的双稳态触发器，以控制另外的触发器的输出。 另外的触发器的输出产生指示两个信号的相对频率的相应信号，并且其可以用于改变该相对频率。
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