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1.发明授权Method of making self-aligned, lateral diffusion barrier in metal lines to eliminate electromigration 失效在金属线上制作自对准横向扩散阻挡层以消除电迁移的方法
公开(公告)号：US5470788A
公开(公告)日：1995-11-28
申请号：US203158
申请日：1994-02-28
IPC分类号： H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/522 , H01L23/528 , H01L23/532 , H01L21/441
CPC分类号： H01L23/5283 , H01L23/53214 , H01L23/53257 , H01L2924/0002 , Y10S438/927
摘要： A method of providing interconnections to a semiconductor integrated chip designed to eliminate electromigration. The method includes the steps of forming an interconnection with segments of Al interspersed with segments of a refractory metal, wherein each aluminum segments is followed by a segment of refractory metal, aligning the aluminum and refractory metal segments with respect to each other ensuring electrical continuity.
摘要翻译： 为半导体集成芯片提供互连以消除电迁移的方法。 该方法包括以下步骤：与散布有难熔金属片段的铝片段形成互连，其中每个铝片段之后是难熔金属片段，使铝和难熔金属片段相对于彼此对准确保电连续性。
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公开(公告)号：US5434385A
公开(公告)日：1995-07-18
申请号：US970370
申请日：1992-11-02
CPC分类号： G01R29/26
摘要： A test system having an improved physical layout and electrical design allows the 1/f noise of metal interconnects to be measured at levels close to that of Johnson or thermal noise. A detailed description of examples of operation of the test system provides evidence of the effectiveness of the test system in minimizing system noise to a level significantly lower than Johnson noise. This permits quantitative measurment of the noise contribution attributable to variations in cross-sectional area of connections for various applications and for qualitative prediction of electromigration lifetimes of metal films, particularly aluminum, having different microstructures. The test system includes an enclosure which includes several nested groups of housings including a sample oven within a device under test box which is, in turn, contained within the system enclosure. Wire wound resistors powered by a DC power supply are used to provide heating without interfering with measurement of 1/f noise of a device under test (D.U.T.). A biasing circuit and a bank of batteries are also provided with separate enclosures within the system enclosure.
摘要翻译： 具有改进的物理布局和电气设计的测试系统允许以接近Johnson或热噪声的水平测量金属互连的1 / f噪声。 测试系统操作示例的详细描述提供了测试系统在将系统噪声降至明显低于约翰逊噪声水平的有效性的证据。 这允许由于各种应用的连接的横截面积的变化以及用于定性预测具有不同微结构的金属膜，特别是铝的电迁移寿命的噪声贡献的定量测量。 该测试系统包括一个外壳，该外壳包括若干嵌套的外壳组，其中包括在被测箱的设备内的样品烘箱，该烘箱也被包含在系统外壳内。 由直流电源供电的绕线电阻器用于提供加热，而不会干扰被测器件（D.U.T.）的1 / f噪声的测量。 偏置电路和电池组还在系统外壳内设置有单独的外壳。
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公开(公告)号：US20130330846A1
公开(公告)日：2013-12-12
申请号：US13494160
申请日：2012-06-12
申请人： Jinbang Tang , Daniel M. Boyne
发明人： Jinbang Tang , Daniel M. Boyne
CPC分类号： H01L24/49 , G01R31/2898 , H01L22/32 , H01L22/34 , H01L24/45 , H01L24/48 , H01L2224/05554 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/4813 , H01L2224/48227 , H01L2224/49111 , H01L2924/00014 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2224/05599 , H01L2924/00 , H01L2924/00012
摘要： A mechanism to electrically evaluate signals within an encapsulated semiconductor device package without the need for redesigning the package substrate is provided. Test bond pads are provided on a top surface of a semiconductor device die being placed within the semiconductor device package. One or more wire bonds having an elevated loop height are formed on the test bond pads. After encapsulating the semiconductor device package, the package encapsulant is subject to a backgrind process to expose a portion of the test connection wire bonds. Only an amount of the package encapsulant sufficient to expose each test connection wire bond is removed, so that the remaining encapsulant will continue to have the same effect on the package as would be present in a production device. Test probes can then be applied to the exposed test connection wire bonds.
摘要翻译： 提供了一种用于电气评估封装的半导体器件封装中的信号而不需要重新设计封装衬底的机构。 测试接合焊盘设置在放置在半导体器件封装内的半导体器件裸片的顶表面上。 在测试接合垫上形成一个或多个具有提高的环高度的引线键。 在封装半导体器件封装之后，封装密封剂经受背面研磨工艺以暴露部分测试连接引线键合。 除去足以暴露每个测试连接引线接合的一定量的封装密封剂，使得剩余的密封剂将继续对包装产生与在生产设备中存在的相同的效果。 然后可以将测试探针应用于暴露的测试连接引线键合。
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公开(公告)号：US5563517A
公开(公告)日：1996-10-08
申请号：US442556
申请日：1995-05-16
CPC分类号： G01R29/26
摘要： A test system having an improved physical layout and electrical design allows the 1/f noise of metal interconnects to be measured at levels close to that of Johnson or thermal noise. A detailed description of examples of operation of the test system provides evidence of the effectiveness of the test system in minimizing system noise to a level significantly lower than Johnson noise. This permits quantitative measurment of the noise contribution attributable to variations in cross-sectional area of connections for various applications and for qualitative prediction of electromigration lifetimes of metal films, particularly aluminum, having different microstructures. The test system includes an enclosure which includes several nested groups of housings including a sample oven within a device under test box which is, in turn, contained within the system enclosure. Wire wound resistors powered by a DC power supply are used to provide heating without interfering with measurement of 1/f noise of a device under test (D.U.T.). A biasing circuit and a bank of batteries are also provided with separate enclosures within the system enclosure.
摘要翻译： 具有改进的物理布局和电气设计的测试系统允许以接近Johnson或热噪声的水平测量金属互连的1 / f噪声。 测试系统操作示例的详细描述提供了测试系统在将系统噪声降至明显低于约翰逊噪声水平的有效性的证据。 这允许由于各种应用的连接的横截面积的变化以及用于定性预测具有不同微结构的金属膜，特别是铝的电迁移寿命的噪声贡献的定量测量。 该测试系统包括一个外壳，该外壳包括若干嵌套的外壳组，其中包括在被测箱的设备内的样品烘箱，该烘箱也被包含在系统外壳内。 由直流电源供电的绕线电阻器用于提供加热，而不会干扰被测器件（D.U.T.）的1 / f噪声的测量。 偏置电路和电池组还在系统外壳内设置有单独的外壳。
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