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    LOW DROP OUT VOLTAGE REGULATOR
    1.
    发明申请
    LOW DROP OUT VOLTAGE REGULATOR 有权
    低压降稳压器

    公开(公告)号：US20140253067A1

    公开(公告)日：2014-09-11

    申请号：US13788917

    申请日：2013-03-07

    申请人： Ramon Tortosa NAVAS ,  Enrique COMPANY BOSCH ,  Santiago IRIARTE

    发明人： Ramon Tortosa NAVAS ,  Enrique COMPANY BOSCH ,  Santiago IRIARTE

    IPC分类号： G05F1/46

    CPC分类号： G05F1/575

    摘要： A low drop out voltage regulator comprising: a transistor having an input node, an output node, and a control node; a differential amplifier having an output connected to the control node of the transistor and having a first input node; and a feedback capacitor connected between the output node of the transistor and the first input of the differential amplifier, wherein a voltage at the output of the transistor is dependent on a charge across the feedback capacitor.

    摘要翻译： 一种低压降稳压器，包括：具有输入节点，输出节点和控制节点的晶体管; 差分放大器，具有连接到晶体管的控制节点并具有第一输入节点的输出; 以及连接在晶体管的输出节点和差分放大器的第一输入端之间的反馈电容器，其中晶体管的输出端的电压取决于反馈电容器两端的电荷。

    SWITCH CIRCUITS
    2.
    发明申请
    SWITCH CIRCUITS 有权
    开关电路

    公开(公告)号：US20120299637A1

    公开(公告)日：2012-11-29

    申请号：US13115703

    申请日：2011-05-25

    申请人： Enrique COMPANY BOSCH ,  John Anthony CLEARY

    发明人： Enrique COMPANY BOSCH ,  John Anthony CLEARY

    IPC分类号： H03K17/687 ,  H03K3/01

    CPC分类号： H03K17/063 ,  G01R27/2605 ,  H03K2017/066 ,  H03K2217/0018 ,  H03K2217/0054

    摘要： A switch can be implemented by a switch circuit, which can include a pair of NMOS transistors connected in series as pass-through transistors to transmit an input signal at an input terminal to produce an output signal at output terminal in response to an active state of a switching signal, and a pair of PMOS transistors connected in series as pass-through transistors to transmit the input signal at the input terminal to produce the output signal at output terminal in response to the active state of the switching signal. The switch circuit can also include a switch network connecting, in response to the active state of the switching signal, sources to bodies of the pairs of NMOS and PMOS transistors, and connecting, in response to an inactive state of the switching signal, the bodies of the pair of NMOS transistors to a first reference voltage, the bodies of the pair of PMOS transistors to a second reference voltage, and the sources of the pairs of NMOS and PMOS transistors to a third reference voltage. A capacitance-to-voltage converter can include one or more of the switch circuits.

    摘要翻译： 开关可以由开关电路实现，开关电路可以包括一对NMOS晶体管，其串联连接为直通晶体管，以在输入端子处传输输入信号，以在输出端产生输出信号，以响应于 开关信号和一对PMOS晶体管串联连接作为直通晶体管，以在输入端发送输入信号，以响应于开关信号的有效状态在输出端产生输出信号。 开关电路还可以包括开关网络，响应于开关信号的活动状态，将源极连接到NMOS和PMOS晶体管对的主体，并且响应于开关信号的非活动状态而连接主体 的一对NMOS晶体管的第一参考电压，一对PMOS晶体管的主体到第二参考电压，并且NMOS和PMOS晶体管对的源极到第三参考电压。 电容 - 电压转换器可以包括一个或多个开关电路。

    Switch circuits
    4.
    发明授权
    Switch circuits 有权
    开关电路

    公开(公告)号：US08368453B2

    公开(公告)日：2013-02-05

    申请号：US13115703

    申请日：2011-05-25

    申请人： Enrique Company Bosch ,  John Anthony Cleary

    发明人： Enrique Company Bosch ,  John Anthony Cleary

    IPC分类号： H03K17/687

    CPC分类号： H03K17/063 ,  G01R27/2605 ,  H03K2017/066 ,  H03K2217/0018 ,  H03K2217/0054

    摘要： A switch can be implemented by a switch circuit, which can include a pair of NMOS transistors connected in series as pass-through transistors to transmit an input signal at an input terminal to produce an output signal at output terminal in response to an active state of a switching signal, and a pair of PMOS transistors connected in series as pass-through transistors to transmit the input signal at the input terminal to produce the output signal at output terminal in response to the active state of the switching signal. The switch circuit can also include a switch network connecting, in response to the active state of the switching signal, sources to bodies of the pairs of NMOS and PMOS transistors, and connecting, in response to an inactive state of the switching signal, the bodies of the pair of NMOS transistors to a first reference voltage, the bodies of the pair of PMOS transistors to a second reference voltage, and the sources of the pairs of NMOS and PMOS transistors to a third reference voltage. A capacitance-to-voltage converter can include one or more of the switch circuits.

    摘要翻译： 开关可以由开关电路实现，开关电路可以包括一对NMOS晶体管，其串联连接为直通晶体管，以在输入端子处传输输入信号，以在输出端产生输出信号，以响应于 开关信号和一对PMOS晶体管串联连接作为直通晶体管，以在输入端发送输入信号，以响应于开关信号的有效状态在输出端产生输出信号。 开关电路还可以包括开关网络，响应于开关信号的活动状态，将源极连接到NMOS和PMOS晶体管对的主体，并且响应于开关信号的非活动状态而连接主体 的一对NMOS晶体管的第一参考电压，一对PMOS晶体管的主体到第二参考电压，并且NMOS和PMOS晶体管对的源极到第三参考电压。 电容 - 电压转换器可以包括一个或多个开关电路。

    Low drop out voltage regulator
    6.
    发明授权
    Low drop out voltage regulator 有权
    低压降稳压器

    公开(公告)号：US09098104B2

    公开(公告)日：2015-08-04

    申请号：US13788917

    申请日：2013-03-07

    申请人： Ramon Tortosa Navas ,  Enrique Company Bosch ,  Santiago Iriarte

    发明人： Ramon Tortosa Navas ,  Enrique Company Bosch ,  Santiago Iriarte

    IPC分类号： G05F1/40 ,  G05F1/575

    CPC分类号： G05F1/575

    摘要： A low drop out voltage regulator comprising: a transistor having an input node, an output node, and a control node; a differential amplifier having an output connected to the control node of the transistor and having a first input node; and a feedback capacitor connected between the output node of the transistor and the first input of the differential amplifier, wherein a voltage at the output of the transistor is dependent on a charge across the feedback capacitor.

    摘要翻译： 一种低压降稳压器，包括：具有输入节点，输出节点和控制节点的晶体管; 差分放大器，具有连接到晶体管的控制节点并具有第一输入节点的输出; 以及连接在晶体管的输出节点和差分放大器的第一输入端之间的反馈电容器，其中晶体管的输出端的电压取决于反馈电容器两端的电荷。

    TECHNIQUES FOR CAPACITIVE TOUCH SCREEN CONTROL
    7.
    发明申请
    TECHNIQUES FOR CAPACITIVE TOUCH SCREEN CONTROL 审中-公开
    电容触摸屏控制技术

    公开(公告)号：US20130050132A1

    公开(公告)日：2013-02-28

    申请号：US13218788

    申请日：2011-08-26

    申请人： Javier Calpe Maravilla ,  Alberto Marinas ,  Santiago Iriarte ,  Enrique Company Bosch ,  Miguel Chanca ,  Reza Alavi ,  Vladimir Friedman ,  John Cleary

    发明人： Javier Calpe Maravilla ,  Alberto Marinas ,  Santiago Iriarte ,  Enrique Company Bosch ,  Miguel Chanca ,  Reza Alavi ,  Vladimir Friedman ,  John Cleary

    IPC分类号： G06F3/045

    CPC分类号： G06F3/044 ,  G06F1/3262 ,  G06F3/0418

    摘要： Techniques to control a capacitive touch screen that decrease processing time and increase noise rejection. The techniques may include injecting a plurality of excitation signals having unique spectral profiles onto conductors of the capacitive touch screen, sampling signals returned from the screen, and determining a location of touch. The techniques may further include injecting a plurality of excitation signals having unique spectral profiles onto adjacent or non-adjacent conductors of the capacitive touch screen. The techniques may further include injecting a plurality of excitation signals having unique spectral profiles onto conductors of the capacitive touch screen in unequal measures. The techniques may also include mapping frequency characteristics of noise present on the capacitive touch screen.

    摘要翻译： 用于控制电容式触摸屏的技术，其减少处理时间并增加噪声抑制。 这些技术可以包括将具有独特光谱轮廓的多个激励信号注入到电容式触摸屏的导体上，从屏幕返回的采样信号以及确定触摸的位置。 这些技术可以进一步包括将具有唯一光谱轮廓的多个激励信号注入到电容式触摸屏的相邻或非相邻导体上。 这些技术可以进一步包括以不相等的措施将具有独特光谱分布的多个激励信号注入到电容式触摸屏的导体上。 这些技术还可以包括映射存在于电容式触摸屏上的噪声的频率特性。