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公开(公告)号：US10135426B1
公开(公告)日：2018-11-20
申请号：US15960580
申请日：2018-04-24
Applicant: University of Electronic Science and Technology of China , Institute of Electronic and Information Engineering of UESTC in Guangdong
IPC: H03K3/012 , H03K17/041 , H03K17/16
Abstract: A gate charge and discharge adjustment regulating circuit for a gate control device belongs to the power electronics technology field. The switch control signal is connected to the control terminals of the four analog switches. The gate control signal is loaded on the gate of the correct field effect transistor under the action of the four analog switches to control the switching-on degree so as to achieve the purpose of adjusting the gate driving signal current, that is, regulating the gate charge and discharge currents of the gate control device to realize the change of the switching characteristics and conduction characteristics. The switch control signal is connected to the input terminal of the gate driving module to control the gate driving module to generate the gate driving signal.
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公开(公告)号：US20190004553A1
公开(公告)日：2019-01-03
申请号：US16026081
申请日：2018-07-03
Applicant: University of Electronic Science and Technology of China , Institute of Electronic and Information Engineering of UESTC in Guangdong
Inventor： Xin MING , Jiahao ZHANG , Wenlin ZHANG , Di GAO , Xuan ZHANG , Zhuo WANG , Bo ZHANG
CPC classification number: G05F1/575 , H03F3/082 , H03F3/3061 , H03F3/45183 , H03F3/45264 , H03F3/45269 , H03F3/45273
Abstract: A ripple pre-amplification based fully integrated LDO pertains to the technical field of power management. The positive input terminal of a transconductance amplifier is connected to a reference voltage Vref, and the negative input terminal of the transconductance amplifier is connected to the feedback voltage Vfb. The output terminal of the transconductance amplifier is connected to the negative input terminal of a transimpedance amplifier and the negative input terminal of an error amplifier. The positive input terminal of the transimpedance amplifier is connected to the ground GND, and the output terminal of the transimpedance amplifier is connected to the positive input terminal of the error amplifier. The gate terminal of the power transistor MP is connected to the output terminal of the error amplifier, the source terminal of the power transistor MP is connected to an input voltage VIN, and the drain terminal of the power transistor MP is grounded.
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公开(公告)号：US20230036698A1
公开(公告)日：2023-02-02
申请号：US17876582
申请日：2022-07-29
Applicant: University of Electronic Science and Technology of China , Institute of Electronic and Information Engineering of UESTC in Guangdong
Inventor： Ruize SUN , Wanjun CHEN , Chao LIU , Pan LUO , Fangzhou WANG
IPC: H01L29/20 , H01L29/66 , H01L29/778 , H01L29/06
Abstract: A reverse blocking gallium nitride (GaN) high electron mobility transistor includes, sequentially stacked from bottom to top, a substrate, a nucleation layer, a buffer layer, a barrier layer, a dielectric layer. The buffer layer and the barrier layer form a heterojunction structure. The barrier layer is provided with at least two p-GaN structures. The barrier layer is provided with a source metal at one end and a drain metal at the other end, source metal forms ohmic contact and drain metal forms Schottky contact with AlGaN barrier, respectively. In forward conduction, the two-dimensional electron gas below the spaced p-GaN structure connected to the drain metal is conductive, and a turn-on voltage of the device is low. During reverse blocking, the two-dimensional electron gas at the spaced p-GaN structure is rapidly depleted under reverse bias, to form a depletion region, so that the blocking capability of the device is improved.
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公开(公告)号：US10353417B2
公开(公告)日：2019-07-16
申请号：US16026081
申请日：2018-07-03
Applicant: University of Electronic Science and Technology of China , Institute of Electronic and Information Engineering of UESTC in Guangdong
Inventor： Xin Ming , Jiahao Zhang , Wenlin Zhang , Di Gao , Xuan Zhang , Zhuo Wang , Bo Zhang
Abstract: A ripple pre-amplification based fully integrated LDO pertains to the technical field of power management. The positive input terminal of a transconductance amplifier is connected to a reference voltage Vref, and the negative input terminal of the transconductance amplifier is connected to the feedback voltage Vfb. The output terminal of the transconductance amplifier is connected to the negative input terminal of a transimpedance amplifier and the negative input terminal of an error amplifier. The positive input terminal of the transimpedance amplifier is connected to the ground GND, and the output terminal of the transimpedance amplifier is connected to the positive input terminal of the error amplifier. The gate terminal of the power transistor MP is connected to the output terminal of the error amplifier, the source terminal of the power transistor MP is connected to an input voltage VIN, and the drain terminal of the power transistor MP is grounded.
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Patent Agency Ranking
公开(公告)号：US10340332B2
公开(公告)日：2019-07-02
申请号：US15774286
申请日：2016-09-17
Applicant: University of Electronic Science and Technology of China , Institute of Electronic and Information Engineering of UESTC in Guangdong
Inventor： Min Ren , Yumeng Zhang , Cong Di , Jingzhi Xiong , Zehong Li , Jinping Zhang , Wei Gao , Bo Zhang
Abstract: A junction termination with an internal field plate, the field plate structure and the junction termination extension region are folded inside the device to make full use of the thickness of the drift region in the body, thereby reducing the area of the termination and relieving the electric field concentration at the end of the PN junction. The breakdown position is transferred from the surface into the body of the original PN junction, and the withstand voltage of termination can reach to the breakdown voltage of the parallel plane junction. Under such design, a smaller area can be obtained than that of the conventional structure at the same withstand voltage.
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公开(公告)号：US20230352576A1
公开(公告)日：2023-11-02
申请号：US17876572
申请日：2022-07-29
Applicant: University of Electronic Science and Technology of China , Institute of Electronic and Information Engineering of UESTC in Guangdong
Inventor： Ming QIAO , Ruidi WANG , Yibing WANG , Bo ZHANG
CPC classification number: H01L29/7811 , H01L29/0634 , H01L29/405
Abstract: A termination structure of a super-junction power device has a novel polysilicon resistive field plate at the top of a termination region between a transition region and an edge of the device. By utilizing the regular distribution of potential in the field plate, an additional electric field is introduced at the top of the termination structure to limit the expansion of a non-depletion region and optimize the distribution of charges. The termination structure includes a first doping type epitaxial layer, a second doping type compensation region, a second doping type body region, a second doping type lateral connection layer, a second doping type body contact region, a first doping type source contact region, a gate oxide layer, a passivation layer, a field oxide layer, a gate electrode, a second doping type edge contact region, a polysilicon resistive field plate, a metal layer and the like.
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公开(公告)号：US20230129440A1
公开(公告)日：2023-04-27
申请号：US17831454
申请日：2022-06-03
Applicant: University of Electronic Science and Technology of China , Institute of Electronic and Information Engineering of UESTC in Guangdong
Inventor： Ming QIAO , Ruidi WANG , Yibing WANG , Wenyang BAI , Bo ZHANG
IPC: H01L29/06 , H01L29/10 , H01L29/78 , H01L21/265 , H01L21/266 , H01L21/761 , H01L29/66
Abstract: A method for manufacturing a semiconductor device is provided. A drift region and a compensation region are formed through a deep trench etching and a filling technology. A plurality of modulation doping regions are formed at a top of the drift region by an epitaxy and an ion implantation. A modulation region is introduced, wherein the modulation region flexibly modifies capacitance characteristics and achieve improved dynamic characteristics.
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公开(公告)号：US10546951B2
公开(公告)日：2020-01-28
申请号：US15774291
申请日：2016-09-17
Applicant: University of Electronic Science and Technology of China , Institute of Electronic and Information Engineering of UESTC in Guangdong
Inventor： Min Ren , Yuci Lin , Chi Xie , Zhiheng Su , Zehong Li , Jinping Zhang , Wei Gao , Bo Zhang
IPC: H01L29/78 , H01L29/423
Abstract: A trench MOS device with improved single event burnout endurance, applied in the field of semiconductor. The device is provided, in an epitaxial layer, with a conductive type semiconductor pillar connected to a source and a second conductive type current-directing region. Whereby, the trajectory of the electron-hole pairs induced by the single event effect is changed and thus avoids the single event burnout caused by the triggering of parasitic transistors, therefore improving the endurance of the single event burnout of the trench MOS device.
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公开(公告)号：US10158350B1
公开(公告)日：2018-12-18
申请号：US15960573
申请日：2018-04-24
Applicant: University of Electronic Science and Technology of China , Institute of Electronic and Information Engineering of UESTC in Guangdong
Abstract: The double pulse generator of the level shifter circuit takes out the rising edge and falling edge of the pulse width modulation signal PWM_H and generates corresponding narrow pulse signals. The two narrow pulse signals respectively pass through the pulse shaper to control the two field effect transistors in the switching circuit. The pulse width of the narrow pulse signal is not enough to completely switch on the two field effect transistors, so the generated waveform is a sawtooth wave; the drains of the two field effect transistors are respectively connected to the hysteresis-adjustable Schmidt trigger to restore the narrow pulse signal to the rising edge and falling edge pulse signal of the pulse width modulation signal PWM_HS with respect to the floating side VS, and then the signal is restored to the level-shifted pulse width modulation signal PWM HS after passing through the RS latch.
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