公开(公告)号：US11758365B2

公开(公告)日：2023-09-12

申请号：US17394211

申请日：2021-08-04

Applicant: ST Microelectronics International N.V.

Inventor： Jitendra Jain ,  Alok Kumar Mittal

IPC: H04W4/029 ,  H04W4/18 ,  H04W4/80 ,  H04W4/33 ,  H04W84/18

CPC classification number: H04W4/029 ,  H04W4/185 ,  H04W4/33 ,  H04W4/80 ,  H04W84/18

Abstract: This application discloses systems, devices, and methods for indoor navigation and tracking with a mesh network. In one aspect, a navigation device includes a receiver configured to receive a locational signal from a node network. The locational signal identifies a respective node of the node network, and the node network is distributed throughout a physical space. The navigation device includes a memory storing a program and a processor in communication with the receiver and configured to execute the program to calculate a position of the navigation device from the identity of the respective node, determine a routing instruction from the position of the navigation device to a destination based on the position of the navigation device and a known mapping of the node network in the physical space, and update the position of the navigation device and the routing instruction as the navigation device moves through the physical space.

公开(公告)号：US20150214928A1

公开(公告)日：2015-07-30

申请号：US14166615

申请日：2014-01-28

Applicant: ST Microelectronics International N.V.

Inventor： Sameer Vashishtha

IPC: H03K3/01 ,  H03K17/687

CPC classification number: H03K17/687 ,  H03K5/12 ,  H03K19/0185 ,  H03K19/018507

Abstract: A drive circuit includes an input, a driver, a first buffer, a second buffer, a first capacitance element, and a second capacitance element. The driver includes a first PMOS transistor and a first NMOS transistor coupled in series between a supply terminal and a reference terminal. The first buffer is coupled between the input and a control terminal of the first PMOS transistor. The second buffer is coupled between the input and a control terminal of the first NMOS transistor. The first capacitance element is coupled to the control terminal of the first PMOS transistor through a first semiconductor switch. The second capacitance element is coupled to the control terminal of the first NMOS transistor through a second semiconductor switch.

Abstract translation: 驱动电路包括输入，驱动器，第一缓冲器，第二缓冲器，第一电容元件和第二电容元件。 驱动器包括串联耦合在电源端子和参考端子之间的第一PMOS晶体管和第一NMOS晶体管。 第一缓冲器耦合在第一PMOS晶体管的输入端和控制端之间。 第二缓冲器耦合在第一NMOS晶体管的输入端和控制端之间。 第一电容元件通过第一半导体开关耦合到第一PMOS晶体管的控制端。 第二电容元件通过第二半导体开关耦合到第一NMOS晶体管的控制端子。

公开(公告)号：US20210368299A1

公开(公告)日：2021-11-25

申请号：US17394211

申请日：2021-08-04

Applicant: ST Microelectronics International N.V.

Inventor： Jitendra Jain ,  Alok Kumar Mittal

IPC: H04W4/029 ,  H04W4/33

Abstract: This application discloses systems, devices, and methods for indoor navigation and tracking with a mesh network. In one aspect, a navigation device includes a receiver configured to receive a locational signal from a node network. The locational signal identifies a respective node of the node network, and the node network is distributed throughout a physical space. The navigation device includes a memory storing a program and a processor in communication with the receiver and configured to execute the program to calculate a position of the navigation device from the identity of the respective node, determine a routing instruction from the position of the navigation device to a destination based on the position of the navigation device and a known mapping of the node network in the physical space, and update the position of the navigation device and the routing instruction as the navigation device moves through the physical space.

公开(公告)号：US09473134B2

公开(公告)日：2016-10-18

申请号：US14166615

申请日：2014-01-28

Applicant: ST Microelectronics International N.V.

Inventor： Sameer Vashishtha

IPC: H03K3/00 ,  H03B1/00 ,  H03K17/687 ,  H03K19/0185 ,  H03K5/12

CPC classification number: H03K17/687 ,  H03K5/12 ,  H03K19/0185 ,  H03K19/018507

Abstract: A drive circuit includes an input, a driver, a first buffer, a second buffer, a first capacitance element, and a second capacitance element. The driver includes a first PMOS transistor and a first NMOS transistor coupled in series between a supply terminal and a reference terminal. The first buffer is coupled between the input and a control terminal of the first PMOS transistor. The second buffer is coupled between the input and a control terminal of the first NMOS transistor. The first capacitance element is coupled to the control terminal of the first PMOS transistor through a first semiconductor switch. The second capacitance element is coupled to the control terminal of the first NMOS transistor through a second semiconductor switch.

Abstract translation: 驱动电路包括输入，驱动器，第一缓冲器，第二缓冲器，第一电容元件和第二电容元件。 驱动器包括串联耦合在电源端子和参考端子之间的第一PMOS晶体管和第一NMOS晶体管。 第一缓冲器耦合在第一PMOS晶体管的输入端和控制端之间。 第二缓冲器耦合在第一NMOS晶体管的输入端和控制端之间。 第一电容元件通过第一半导体开关耦合到第一PMOS晶体管的控制端。 第二电容元件通过第二半导体开关耦合到第一NMOS晶体管的控制端子。