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公开(公告)号：US20250132596A1
公开(公告)日：2025-04-24
申请号：US18382776
申请日：2023-10-23
Applicant: STMicroelectronics International N.V.
Inventor： Domenico RAGONESE , Marco MINIERI , Maurizio GRECO , Vincenzo MARANO , Vojtech ELIAS , Milos HOFMAN
Abstract: A power-management system includes a power transistor coupled between a power supply and load, a driver circuit driving the power transistor in response to an input signal, and an error amplifier generating a control signal that modifies operation of the driver circuit based on a comparison between a selected reference voltage and a drain-to-source voltage of the power transistor. A multiplexer provides the selected reference voltage to the error amplifier and passes one of a plurality of different reference voltages as the selected reference voltage based upon first and second selection signals. A first selection circuit charges a first capacitor in response to the input signal and generates the first selection signal based on a first voltage across the first capacitor. A second selection circuit charges a second capacitor in response to the input signal and generates the second selection signal based on a second voltage across the second capacitor.
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2.发明申请公开(公告)号：US20250119065A1
公开(公告)日：2025-04-10
申请号：US18481333
申请日：2023-10-05
Applicant: STMicroelectronics International N.V.
Inventor： Francois TAILLIET , Guglielmo SIRNA
Abstract: A bridge rectifier circuit and a wireless power receiver configured to receive high voltage AC inputs and generate a stable DC voltage without exposing the bridge rectifier circuitry components to damaging high voltages are provided. The example bridge rectifier includes a plurality of rectifying transistors positioned to generate a DC voltage upon receiving an AC current. The example bridge rectifier circuitry further includes voltage control circuitry designed to output an intermediate voltage to a terminal of one or all of the rectifying transistors of the bridge rectifier. The output intermediate voltage prevents a voltage difference across the terminal of the rectifying transistor from exceeding a maximum voltage rating of the rectifying transistor.
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3.发明申请公开(公告)号：US20250119056A1
公开(公告)日：2025-04-10
申请号：US18891647
申请日：2024-09-20
Applicant: STMicroelectronics International N.V.
Inventor： Fabio CACCIOTTO , Salvatore TORRISI
Abstract: Provided is a power supply control circuit for a power supply, including a PFC converter configured to generate a bus voltage, an electronic converter and an auxiliary power supply configured to generate an auxiliary supply voltage. The PFC converter comprises a PFC control circuit configured to drive the PFC converter to regulate the bus voltage to a requested value. When the output power is greater than the threshold, the power supply control circuit supplies the PFC control circuit with the auxiliary supply voltage. When the output power is smaller than the threshold, the circuit compares the bus voltage to upper and lower thresholds. When the bus voltage is greater than the upper threshold, the circuit inhibits supply of the PFC control circuit with the auxiliary supply voltage. When the bus voltage is smaller than a lower threshold, the circuit supplies the PFC control circuit with the auxiliary supply voltage.
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公开(公告)号：US20250118613A1
公开(公告)日：2025-04-10
申请号：US18892003
申请日：2024-09-20
Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
Inventor： Paolo COLPANI , Luisito LIVELLARA
Abstract: The present disclosure generally provides for a high electron mobility transistor or HEMT. An example HEMT includes a first semiconductor layer; a gate arranged on a first surface of the first semiconductor layer; a first passivation layer comprising at least a sub-layer of a first dielectric material on the sides of the gate, the first passivation layer further extending over a first portion of the surface of the first semiconductor layer; and a second passivation layer, distinct from the first passivation layer, comprising at least a sub-layer of the same first dielectric material on a second portion of the surface of the first semiconductor layer next to the first passivation layer.
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公开(公告)号：US20250117500A1
公开(公告)日：2025-04-10
申请号：US18896096
申请日：2024-09-25
Applicant: STMicroelectronics International N.V.
Inventor： Jean-Michel GRIL-MAFFRE , Christophe EVA
IPC: G06F21/60
Abstract: The present disclosure provides a system and method for reading an encryption/decryption key. An example includes at least one first word comprising a plurality of bits, with the system including: a first comparison means, a first delivery means, a second comparison means, and a second delivery means.
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Patent Agency Ranking
公开(公告)号：US12273089B2
公开(公告)日：2025-04-08
申请号：US17800277
申请日：2021-02-15
Applicant: STMicroelectronics International N.V.
Inventor： Guillaume Blamon , Emmanuel Picard , Christophe Boyavalle
Abstract: The integrated circuit includes a power amplifier intended to provide a signal in a fundamental frequency band, an antenna, and a matching and filtering network having a first section, a second section, and a third section. The three sections include LC arrangements configured to have an impedance matched to the power amplifier's output in the fundamental frequency band. The LC arrangements of the first section and the second section are configured to have resonant frequencies adapted to attenuate the harmonic frequency bands of the fundamental frequency band.
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公开(公告)号：US20250113511A1
公开(公告)日：2025-04-03
申请号：US18903368
申请日：2024-10-01
Applicant: STMicroelectronics International N.V.
Inventor： Edoardo BREZZA , Alexis GAUTHIER
IPC: H01L29/66 , H01L21/764 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/737
Abstract: To manufacture a bipolar transistor, a first stack of layers including a first layer made of the material of the base of the bipolar transistor is formed between second and third insulating layers. A first cavity is then formed crossing the first stack in such a way as to reach the substrate. The forming of the first cavity includes an etching of no layer covering the first layer other than the third layer. A first portion of the collector of the bipolar transistor and a second portion of the base of the bipolar transistor are then formed in the first cavity.
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公开(公告)号：US20250112596A1
公开(公告)日：2025-04-03
申请号：US18480322
申请日：2023-10-03
Applicant: STMicroelectronics International N.V.
Inventor： Alessio Emanuele Vergani , Francesco Piscitelli , Michele Bartolini
Abstract: According to an embodiment, an envelope detector circuit for detecting an envelope of a signal from a sensor in a pre-amplifier circuit of a hard disk drive is provided. The circuit includes a half-wave rectifier, a low-pass filter, and a differential full-wave rectifier. The half-wave rectifier receives a differential voltage from the sensor indicating a fly height of the hard disk drive and generates a pair of single-ended output waveforms based on the differential voltage. Each pair of single-ended output waveforms has a positive polarity for a half-cycle it passes through. The low-pass filter includes a first and a second low-pass filter. The low-pass filter allows low-frequency signals from the pair of single-ended output waveforms to pass through while attenuating or blocking higher-frequency signals. The differential full-wave rectifier reconstructs a differential signal from the low-pass filter while removing DC rectified components.
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公开(公告)号：US20250112553A1
公开(公告)日：2025-04-03
申请号：US18480340
申请日：2023-10-03
Applicant: STMicroelectronics International N.V.
Inventor： Claudio Bona , Kien Beng Tan
Abstract: According to an embodiment, a method of operating an M-level buck converter in a battery charging circuit is provided. The M-level buck converter includes 2×N×(M−1) number of transistors. M and N are greater than one. The method includes operating the M-level buck converter in a first mode of the battery charging circuit corresponding to a high-current charge mode. The method further includes operating the M-level buck converter in a second mode of the battery charging circuit corresponding to a low-current charge mode. In the first mode, 2×N×(M−1) number of transistors are switched ON and OFF. In the second mode, 2×(M−1) number of transistors are switched ON and OFF and 2×N×(M−1)−2×(M−1) number of transistors are fully deactivated.
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公开(公告)号：US20250112492A1
公开(公告)日：2025-04-03
申请号：US18478553
申请日：2023-09-29
Applicant: STMicroelectronics International N.V.
Inventor： Roberto LA ROSA
Abstract: Disclosed is an energy autonomous system including an energy transducer, a first capacitor, a second capacitor having greater capacitance than the first capacitor, and a microprocessor. The microprocessor includes a first terminal electrically coupled to the energy transducer and the first capacitor; a second terminal electrically coupled to the second capacitor; a switch that is in a conductive state in which the switch electrically couples the first terminal and second terminals together, or a nonconductive state in which the switch does not electrically couple first terminal and second terminals together; a voltage detector that detects a voltage at the first terminal; and a processor coupled to the voltage detector and the switch. The processor controls charging of the second capacitor by controlling the switch to be in the conductive state or the nonconductive state based on the voltage at the first terminal detected by the voltage detector.
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