公开(公告)号：US20100207204A1

公开(公告)日：2010-08-19

申请号：US12656671

申请日：2010-02-12

申请人： Young-Mok Kim ,  Sun-Hak Lee ,  Tae-Cheol Lee ,  Yong-Sang Jeong

发明人： Young-Mok Kim ,  Sun-Hak Lee ,  Tae-Cheol Lee ,  Yong-Sang Jeong

IPC分类号： H01L29/78

CPC分类号： H01L29/4236 ,  H01L21/823456 ,  H01L21/823462 ,  H01L29/1037 ,  H01L29/7834

摘要： A semiconductor device comprises a recessed trench in a substrate, a gate insulating layer including a first portion and a second portion, the first portion having a first thickness and covering lower portions of sidewalls of the recessed trench and a bottom surface of the recessed trench, and the second portion having a second thickness and covering upper portions of the sidewalls of the recessed trench, the second thickness being greater than the first thickness, a gate electrode filling the recessed trench, a first impurity region having a first concentration and disposed at opposing sides of the gate electrode, and a second impurity region having a second concentration greater than the first concentration and disposed on the first impurity region to correspond to the second portion of the gate insulating layer.

摘要翻译： 半导体器件包括衬底中的凹槽，栅极绝缘层包括第一部分和第二部分，第一部分具有第一厚度并覆盖凹槽的侧壁的下部和凹槽的底表面， 并且所述第二部分具有第二厚度并且覆盖所述凹槽的侧壁的上部，所述第二厚度大于所述第一厚度，填充所述凹陷沟槽的栅电极，具有第一浓度的第一杂质区域并且设置在相对的位置 栅极电极的侧面，以及具有大于第一浓度的第二浓度的第二杂质区域，并且设置在第一杂质区域上以对应于栅极绝缘层的第二部分。

公开(公告)号：US20110109828A1

公开(公告)日：2011-05-12

申请号：US12797672

申请日：2010-06-10

申请人： Young-mok Kim ,  Yong-sang Jeong ,  Tae-cheol Lee

发明人： Young-mok Kim ,  Yong-sang Jeong ,  Tae-cheol Lee

IPC分类号： G02F1/1368 ,  H01L29/78 ,  H01L21/336

CPC分类号： H01L29/1037 ,  H01L21/28114 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66621 ,  H01L29/7834

摘要： Recessed channel transistor (RCT) devices, methods of manufacturing the RCT devices, and a display apparatuses including the RCT devices. A RCT device includes a substrate, a first trench in the substrate and having a first width; a first gate insulating layer on an inner wall of the first trench; a first recess gate on the first gate insulating layer and having a groove in a center portion of an upper surface of the first recess gate; and a source and drain in the substrate on both sides of the first recess gate.

摘要翻译： 嵌入式沟道晶体管（RCT）器件，制造RCT器件的方法以及包括RCT器件的显示器件。 RCT装置包括衬底，衬底中的第一沟槽和具有第一宽度; 在所述第一沟槽的内壁上的第一栅极绝缘层; 第一栅极绝缘层上的第一凹槽，并且在第一凹槽的上表面的中心部分具有凹槽; 以及在第一凹槽的两侧的衬底中的源极和漏极。

公开(公告)号：US20110278662A1

公开(公告)日：2011-11-17

申请号：US13096053

申请日：2011-04-28

申请人： Dong-il Park ,  Joon-ho Cho ,  Tae-cheol Lee ,  Yong-sang Jeong ,  Eun-jeong Park ,  Young-mok Kim ,  Seok-ju Lee

发明人： Dong-il Park ,  Joon-ho Cho ,  Tae-cheol Lee ,  Yong-sang Jeong ,  Eun-jeong Park ,  Young-mok Kim ,  Seok-ju Lee

IPC分类号： H01L29/78

CPC分类号： H01L29/4238 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66628

摘要： A semiconductor device including a recessed channel transistor, and a method of manufacturing the same, provide: a substrate in which an isolation trench is provided; an isolation layer provided in the isolation trench so as to define a pair of source/drain regions in the substrate; a gate pattern provided in the isolation trench between the pair of source/drain regions, the gate pattern having a top surface at a same level as a top surface of the isolation layer and having a bottom surface at a lower depth than the pair of source/drain regions with respect to a top surface of the substrate; and a gate insulating layer provided between the substrate and the gate pattern at a bottom surface of the isolation trench.

摘要翻译： 包括凹陷沟道晶体管的半导体器件及其制造方法提供：其中提供隔离沟槽的衬底; 隔离层，设置在所述隔离沟槽中，以便在所述衬底中限定一对源/漏区; 栅极图案，其设置在所述一对源极/漏极区域之间的隔离沟槽中，所述栅极图案具有与所述隔离层的顶表面相同水平面的顶表面，并且具有比所述一对源极更低深度的底表面 /漏极区域相对于衬底的顶表面; 以及在隔离沟槽的底表面处设置在衬底和栅极图案之间的栅极绝缘层。

公开(公告)号：US08476700B2

公开(公告)日：2013-07-02

申请号：US12656671

申请日：2010-02-12

申请人： Young-Mok Kim ,  Sun-Hak Lee ,  Tae-Cheol Lee ,  Yong-Sang Jeong

发明人： Young-Mok Kim ,  Sun-Hak Lee ,  Tae-Cheol Lee ,  Yong-Sang Jeong

IPC分类号： H01L29/66

CPC分类号： H01L29/4236 ,  H01L21/823456 ,  H01L21/823462 ,  H01L29/1037 ,  H01L29/7834

摘要： A semiconductor device comprises a recessed trench in a substrate, a gate insulating layer including a first portion and a second portion, the first portion having a first thickness and covering lower portions of sidewalls of the recessed trench and a bottom surface of the recessed trench, and the second portion having a second thickness and covering upper portions of the sidewalls of the recessed trench, the second thickness being greater than the first thickness, a gate electrode filling the recessed trench, a first impurity region having a first concentration and disposed at opposing sides of the gate electrode, and a second impurity region having a second concentration greater than the first concentration and disposed on the first impurity region to correspond to the second portion of the gate insulating layer.

摘要翻译： 半导体器件包括衬底中的凹槽，栅极绝缘层包括第一部分和第二部分，第一部分具有第一厚度并覆盖凹槽的侧壁的下部和凹槽的底表面， 并且所述第二部分具有第二厚度并且覆盖所述凹槽的侧壁的上部，所述第二厚度大于所述第一厚度，填充所述凹陷沟槽的栅电极，具有第一浓度的第一杂质区域并且设置在相对的位置 栅极电极的侧面，以及具有大于第一浓度的第二浓度的第二杂质区域，并且设置在第一杂质区域上以对应于栅极绝缘层的第二部分。