公开(公告)号：US20250022847A1

公开(公告)日：2025-01-16

申请号：US18901265

申请日：2024-09-30

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： LEI FU ,  BRETT P. WILKERSON ,  RAHUL AGARWAL

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/538

Abstract: A chip for hybrid bonded interconnect bridging for chiplet integration, the chip comprising: a first chiplet; a second chiplet; an interconnecting die coupled to the first chiplet and the second chiplet through a hybrid bond.

公开(公告)号：US20210193604A1

公开(公告)日：2021-06-24

申请号：US17195046

申请日：2021-03-08

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： PRIYAL SHAH ,  MILIND S. BHAGAVAT ,  LEI FU

IPC: H01L23/00

Abstract: Various semiconductor chips and packages are disclosed. In one aspect, an apparatus is provided that includes a semiconductor chip that has a side, and plural conductive pillars on the side. Each of the conductive pillars includes a pillar portion that has an exposed shoulder facing away from the semiconductor chip. The shoulder provides a wetting surface to attract melted solder. The pillar portion has a first lateral dimension at the shoulder. A solder cap is positioned on the pillar portion. The solder cap has a second lateral dimension smaller than the first lateral dimension.

公开(公告)号：US20230387076A1

公开(公告)日：2023-11-30

申请号：US18324744

申请日：2023-05-26

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： LEI FU ,  BRETT P. WILKERSON ,  RAHUL AGARWAL

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/538

CPC classification number: H01L25/0655 ,  H01L24/13 ,  H01L23/5389 ,  H01L23/5381 ,  H01L2225/06541

Abstract: A chip for hybrid bonded interconnect bridging for chiplet integration, the chip comprising: a first chiplet; a second chiplet; an interconnecting die coupled to the first chiplet and the second chiplet through a hybrid bond.

公开(公告)号：US20220319871A1

公开(公告)日：2022-10-06

申请号：US17843938

申请日：2022-06-17

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： PRIYAL SHAH ,  MILIND S. BHAGAVAT ,  BRETT P. WILKERSON ,  LEI FU ,  RAHUL AGARWAL

IPC: H01L21/56 ,  H01L23/31

Abstract: Various semiconductor chip packages are disclosed. In one aspect, a semiconductor chip package includes a package substrate that has a first side and a second side opposite to the first side. A semiconductor chip is mounted on the first side. Plural metal anchor structures are coupled to the package substrate and project away from the first side. A molding layer is on the package substrate and at least partially encapsulates the semiconductor chip and the anchor structures. The anchor structures terminate in the molding layer and anchor the molding layer to the package substrate.